| Message ID | 20200428210854.28088-3-michael@walle.cc |
|---|---|
| State | Changes Requested |
| Delegated to: | David Miller |
| Headers | show |
| Series | [net-next,1/4] net: phy: bcm54140: use genphy_soft_reset() | expand |
On Tue, Apr 28, 2020 at 11:08:53PM +0200, Michael Walle wrote: > The lower three bits of the phy_id specifies the chip stepping. The > workaround is specifically for the B0 stepping. Apply it only on these > chips. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
On 4/28/20 2:08 PM, Michael Walle wrote: > The lower three bits of the phy_id specifies the chip stepping. The > workaround is specifically for the B0 stepping. Apply it only on these > chips. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
diff --git a/drivers/net/phy/bcm54140.c b/drivers/net/phy/bcm54140.c index edafc9dc2f63..d73cbddbc69b 100644 --- a/drivers/net/phy/bcm54140.c +++ b/drivers/net/phy/bcm54140.c @@ -115,6 +115,9 @@ #define BCM54140_HWMON_IN_ALARM_BIT(ch) ((ch) ? BCM54140_RDB_MON_ISR_3V3 \ : BCM54140_RDB_MON_ISR_1V0) +#define BCM54140_PHY_ID_REV(phy_id) ((phy_id) & 0x7) +#define BCM54140_REV_B0 1 + #define BCM54140_DEFAULT_DOWNSHIFT 5 #define BCM54140_MAX_DOWNSHIFT 9 @@ -632,9 +635,11 @@ static int bcm54140_config_init(struct phy_device *phydev) int ret; /* Apply hardware errata */ - ret = bcm54140_b0_workaround(phydev); - if (ret) - return ret; + if (BCM54140_PHY_ID_REV(phydev->phy_id) == BCM54140_REV_B0) { + ret = bcm54140_b0_workaround(phydev); + if (ret) + return ret; + } /* Unmask events we are interested in. */ reg &= ~(BCM54140_RDB_INT_DUPLEX |
The lower three bits of the phy_id specifies the chip stepping. The workaround is specifically for the B0 stepping. Apply it only on these chips. Signed-off-by: Michael Walle <michael@walle.cc> --- drivers/net/phy/bcm54140.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)