From patchwork Thu Nov 14 11:02:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1194755 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="WOUcLW3G"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47DJVm2RnLz9sNT for ; Thu, 14 Nov 2019 22:03:12 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727083AbfKNLDK (ORCPT ); Thu, 14 Nov 2019 06:03:10 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:34660 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726923AbfKNLDB (ORCPT ); Thu, 14 Nov 2019 06:03:01 -0500 Received: by mail-lj1-f193.google.com with SMTP id 139so6204916ljf.1 for ; Thu, 14 Nov 2019 03:03:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jb+MOMLuIdaHgEwx11sXFvRMBqWhHSyGkvnIDPsupdw=; b=WOUcLW3G2Iayeuu5sPm24T439/72x+v6kvdOeZ3yyOFnInpWwaMAAiMlvEh+zz1v99 KB41QGiNZmpNupPI2zSDjYAUMw+jOuNTtO6FDm4F9YE1ldnhegAL+Omp0xYCregSGy+S Zq9g75zHJ0vatkL7Y7LxTzPd5/s0ZaJslKRZ8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jb+MOMLuIdaHgEwx11sXFvRMBqWhHSyGkvnIDPsupdw=; b=alx8NrRnq5lGYS6dd4oTe/zS2re5EdKTTXp/NVOxmyUvpvlTvdr+zxydKr31URaZTA 0xWn6Yp3A/GNm5AMSXD5Sd8SD5xjAEEwLqsNydlNxa+eoYYvgmnW6Ncc+z7nOi37ICmw NQv9V/G4627aiiDRHu16X6p7Mt3GMnMsH8Lf3XI58IINk1qd8W9/6PEKpf8mWVcvye3G wyKeOXBNxDT6mxfOviujqxav+3gvc0gc5Z7L8oD2H6zc0wRwXJckdLOhpimXpfCkNyOY M0Lk1JgaHKKzPHfLRcKbyfMiWbKimR2kCEp849hy+2V8p+qtI0TXuVv2GsoOSRS8sKTz XkxQ== X-Gm-Message-State: APjAAAXi6ezST68lMd9Z2al9p5L+VY4mHcX3XcEXhS2D/cjXxI5T/Jdm KAX+B4fSK9baWeCg6DBt8Rl2Bg== X-Google-Smtp-Source: APXvYqyjNPi9tG3t/0IsBhpN6J0yN3A7dgHIGn4FZvEHTpjYDUeeXcxIhq+h6bgnCPrbA2iTYR8Fgw== X-Received: by 2002:a2e:7307:: with SMTP id o7mr6253561ljc.10.1573729379406; Thu, 14 Nov 2019 03:02:59 -0800 (PST) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id x5sm2498795lfg.71.2019.11.14.03.02.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2019 03:02:59 -0800 (PST) From: Rasmus Villemoes To: Shawn Guo , Li Yang , Rob Herring , Mark Rutland Cc: Vladimir Oltean , Marc Zyngier , netdev@vger.kernel.org, Andrew Lunn , Rasmus Villemoes , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] ARM: dts: ls1021a-tsn: Use interrupts for the SGMII PHYs Date: Thu, 14 Nov 2019 12:02:53 +0100 Message-Id: <20191114110254.32171-3-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191114110254.32171-1-linux@rasmusvillemoes.dk> References: <20191114110254.32171-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Vladimir Oltean On the LS1021A-TSN board, the 2 Atheros AR8031 PHYs for eth0 and eth1 have interrupt lines connected to the shared IRQ2_B LS1021A pin. Switching to interrupts offloads the PHY library from the task of polling the MDIO status and AN registers (1, 4, 5) every second. Unfortunately, the BCM5464R quad PHY connected to the switch does not appear to have an interrupt line routed to the SoC. Signed-off-by: Vladimir Oltean Signed-off-by: Rasmus Villemoes Reviewed-by: Andrew Lunn --- arch/arm/boot/dts/ls1021a-tsn.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a-tsn.dts b/arch/arm/boot/dts/ls1021a-tsn.dts index 5b7689094b70..9d8f0c2a8aba 100644 --- a/arch/arm/boot/dts/ls1021a-tsn.dts +++ b/arch/arm/boot/dts/ls1021a-tsn.dts @@ -203,11 +203,15 @@ /* AR8031 */ sgmii_phy1: ethernet-phy@1 { reg = <0x1>; + /* SGMII1_PHY_INT_B: connected to IRQ2, active low */ + interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>; }; /* AR8031 */ sgmii_phy2: ethernet-phy@2 { reg = <0x2>; + /* SGMII2_PHY_INT_B: connected to IRQ2, active low */ + interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>; }; /* BCM5464 quad PHY */