From patchwork Sat Jul 27 09:40:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ren=C3=A9_van_Dorst?= X-Patchwork-Id: 1137737 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=reject dis=none) header.from=vdorst.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; secure) header.d=vdorst.com header.i=@vdorst.com header.b="BCxL4cTx"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45wgts3pnfz9s7T for ; Sat, 27 Jul 2019 19:41:08 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387443AbfG0JlC (ORCPT ); Sat, 27 Jul 2019 05:41:02 -0400 Received: from mx.0dd.nl ([5.2.79.48]:33498 "EHLO mx.0dd.nl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387400AbfG0JlC (ORCPT ); Sat, 27 Jul 2019 05:41:02 -0400 Received: from mail.vdorst.com (mail.vdorst.com [IPv6:fd01::250]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx.0dd.nl (Postfix) with ESMTPS id 314ED5FCC5; Sat, 27 Jul 2019 11:41:00 +0200 (CEST) Authentication-Results: mx.0dd.nl; dkim=pass (2048-bit key; secure) header.d=vdorst.com header.i=@vdorst.com header.b="BCxL4cTx"; dkim-atps=neutral Received: from pc-rene.vdorst.com (pc-rene.vdorst.com [192.168.2.125]) by mail.vdorst.com (Postfix) with ESMTPA id D6CD61D2B7F8; Sat, 27 Jul 2019 11:40:59 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.vdorst.com D6CD61D2B7F8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vdorst.com; s=default; t=1564220459; bh=Po8WG1qBDIYCnjQlWQtEgz+phG5m7K/kvenHfs5fjjk=; h=From:To:Cc:Subject:Date:From; b=BCxL4cTxie75o/k9XqkiVfHwB60RmuIQLrriLsw8HsNf+Yfty4lDx6SxsIRdGCAhj n/cdvVUMBhDeraVG32XU/fmgoSPuIIldmJFov0OgmaWlrIQxbbNqu52USv4XgkkjHJ VDgWPjLKfTJvdHPIlHhMlqcEikofCz4kq6m1l37RIu90GFG93XPY6UzvQqlihSAOZ5 /w5ImhYbu5iwWInUP9nznl9CDSeW8lr8dEsCc+88rGFuNCuFRZCW02lFuBNkIwi9S3 oCNO1Z5ooAdICcQX75G5iDkBKEyOIl+jjzVg7g+HTePZSGcpJxV+Gimdy80VwTIqW9 xd5C8BMywzOwA== From: =?utf-8?q?Ren=C3=A9_van_Dorst?= To: Russell King , Andrew Lunn , Florian Fainelli , Heiner Kallweit , "David S . Miller" Cc: netdev@vger.kernel.org, =?utf-8?q?Ren=C3=A9_van_Dorst?= Subject: [PATCH net] net: phylink: Fix flow control for fixed-link Date: Sat, 27 Jul 2019 11:40:11 +0200 Message-Id: <20190727094011.14024-1-opensource@vdorst.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org In phylink_parse_fixedlink() the pl->link_config.advertising bits are AND with pl->supported, pl->supported is zeroed and only the speed/duplex modes and MII bits are set. So pl->link_config.advertising always loses the flow control/pause bits. By setting Pause and Asym_Pause bits in pl->supported, the flow control work again when devicetree "pause" is set in fixes-link node and the MAC advertise that is supports pause. Results with this patch. Legend: - DT = 'Pause' is set in the fixed-link in devicetree. - validate() = ‘Yes’ means phylink_set(mask, Pause) is set in the validate(). - flow = results reported my link is Up line. +-----+------------+-------+ | DT | validate() | flow | +-----+------------+-------+ | Yes | Yes | rx/tx | | No | Yes | off | | Yes | No | off | +-----+------------+-------+ Fixes: 9525ae83959b ("phylink: add phylink infrastructure") Signed-off-by: René van Dorst Acked-by: Russell King --- drivers/net/phy/phylink.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 5d0af041b8f9..a6aebaa14338 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -216,6 +216,8 @@ static int phylink_parse_fixedlink(struct phylink *pl, pl->supported, true); linkmode_zero(pl->supported); phylink_set(pl->supported, MII); + phylink_set(pl->supported, Pause); + phylink_set(pl->supported, Asym_Pause); if (s) { __set_bit(s->bit, pl->supported); } else {