From patchwork Sun Jan 6 08:37:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 1021057 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43XX4Q54f6z9s7h for ; Sun, 6 Jan 2019 19:39:02 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726718AbfAFIjC (ORCPT ); Sun, 6 Jan 2019 03:39:02 -0500 Received: from mx2.suse.de ([195.135.220.15]:57212 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726419AbfAFIiE (ORCPT ); Sun, 6 Jan 2019 03:38:04 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id B7E55ACE3; Sun, 6 Jan 2019 08:38:03 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-lpwan@lists.infradead.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andrea?= =?utf-8?b?cyBGw6RyYmVy?= , Ben Whitten , "David S. Miller" Subject: [PATCH lora-next 04/11] net: lora: sx130x: Fix soft reset Date: Sun, 6 Jan 2019 09:37:47 +0100 Message-Id: <20190106083754.6004-5-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20190106083754.6004-1-afaerber@suse.de> References: <20190106083754.6004-1-afaerber@suse.de> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The soft reset bit is volatile. As it lives in the frequently accessed page register, refrain from marking the register as volatile and instead bypass the cache for this one write. Mark the cache as dirty afterwards. This does not appear to clear it, so manually drop the whole cache. If we don't have a cache configured, this may return -EINVAL, so guard it appropriately to aid in testing. Cc: Ben Whitten Signed-off-by: Andreas Färber --- drivers/net/lora/sx130x.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/net/lora/sx130x.c b/drivers/net/lora/sx130x.c index 7a387d9a75a0..4ba02836a35d 100644 --- a/drivers/net/lora/sx130x.c +++ b/drivers/net/lora/sx130x.c @@ -182,7 +182,19 @@ static int sx130x_field_write(struct sx130x_priv *priv, static int sx130x_soft_reset(struct sx130x_priv *priv) { - return sx130x_field_write(priv, F_SOFT_RESET, 1); + int ret; + + regcache_cache_bypass(priv->regmap, true); + ret = sx130x_field_write(priv, F_SOFT_RESET, 1); + regcache_cache_bypass(priv->regmap, false); + if (ret) + return ret; + + regcache_mark_dirty(priv->regmap); + if (sx130x_regmap_config.cache_type != REGCACHE_NONE) + return regcache_drop_region(priv->regmap, + 0, sx130x_regmap_config.max_register); + return 0; } static int sx130x_agc_ram_read(struct sx130x_priv *priv, u8 addr, unsigned int *val)