From patchwork Wed Oct 10 12:07:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Tudor X-Patchwork-Id: 981814 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42VXvK4rtrz9sCv for ; Wed, 10 Oct 2018 23:09:01 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727068AbeJJTap (ORCPT ); Wed, 10 Oct 2018 15:30:45 -0400 Received: from inva021.nxp.com ([92.121.34.21]:59504 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727529AbeJJT3x (ORCPT ); Wed, 10 Oct 2018 15:29:53 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3948B20018B; Wed, 10 Oct 2018 14:08:00 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2D3E4200174; Wed, 10 Oct 2018 14:08:00 +0200 (CEST) Received: from fsr-ub1864-101.ea.freescale.net (fsr-ub1864-101.ea.freescale.net [10.171.82.46]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 736A320604; Wed, 10 Oct 2018 14:07:59 +0200 (CEST) From: laurentiu.tudor@nxp.com To: devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, arm@kernel.org Cc: roy.pledge@nxp.com, madalin.bucur@nxp.com, davem@davemloft.net, shawnguo@kernel.org, leoyang.li@nxp.com, robin.murphy@arm.com, bharat.bhushan@nxp.com, arnd@arndb.de, Laurentiu Tudor Subject: [PATCH v3 18/22] arm64: dts: ls104xa: set mask to drop TBU ID from StreamID Date: Wed, 10 Oct 2018 15:07:33 +0300 Message-Id: <20181010120737.30300-16-laurentiu.tudor@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181010120737.30300-1-laurentiu.tudor@nxp.com> References: <20181010120737.30300-1-laurentiu.tudor@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Laurentiu Tudor The StreamID entering the SMMU is actually a concatenation of the SMMU TBU ID and the ICID configured in software. Since the TBU ID is internal to the SoC and since we want that the actual the ICID configured in software to enter the SMMU witout any additional set bits, mask out the TBU ID bits and leave only the relevant ICID bits to enter SMMU. Signed-off-by: Laurentiu Tudor --- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 + arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 7eea2bace171..1f9b385007a8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -226,6 +226,7 @@ compatible = "arm,mmu-500"; reg = <0 0x9000000 0 0x400000>; dma-coherent; + stream-match-mask = <0x7f00>; #global-interrupts = <2>; #iommu-cells = <1>; interrupts = , diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 07a853a0aeaa..22bf3975492a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -232,6 +232,7 @@ compatible = "arm,mmu-500"; reg = <0 0x9000000 0 0x400000>; dma-coherent; + stream-match-mask = <0x7f00>; #global-interrupts = <2>; #iommu-cells = <1>; interrupts = ,