| Message ID | 20180827143200.8597-2-hdegoede@redhat.com |
|---|---|
| State | Not Applicable, archived |
| Delegated to: | David Miller |
| Headers | show |
| Series | clk-pmc-atom + r8169: Add ether_clk handling to fix suspend issues | expand |
Quoting Hans de Goede (2018-08-27 07:31:57) > Commit d31fd43c0f9a ("clk: x86: Do not gate clocks enabled by the > firmware") causes all unclaimed PMC clocks on Cherry Trail devices to be on > all the time, resulting on the device not being able to reach S0i2 or S0i3 > when suspended. > > The reason for this commit is that on some Bay Trail / Cherry Trail devices > the ethernet controller uses pmc_plt_clk_4. This commit adds an "ether_clk" > alias, so that the relevant ethernet drivers can try to (optionally) use > this, without needing X86 specific code / hacks, thus fixing ethernet on > these devices without breaking S0i3 support. > > This commit uses clkdev_hw_create() to create the alias, mirroring the code > for the already existing "mclk" alias for pmc_plt_clk_3. > > Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=193891#c102 > Cc: Johannes Stezenbach <js@sig21.net> > Cc: Carlo Caione <carlo@endlessm.com> > Signed-off-by: Hans de Goede <hdegoede@redhat.com> > --- Acked-by: Stephen Boyd <sboyd@kernel.org>
diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-atom.c index 08ef69945ffb..75151901ff7d 100644 --- a/drivers/clk/x86/clk-pmc-atom.c +++ b/drivers/clk/x86/clk-pmc-atom.c @@ -55,6 +55,7 @@ struct clk_plt_data { u8 nparents; struct clk_plt *clks[PMC_CLK_NUM]; struct clk_lookup *mclk_lookup; + struct clk_lookup *ether_clk_lookup; }; /* Return an index in parent table */ @@ -351,11 +352,20 @@ static int plt_clk_probe(struct platform_device *pdev) goto err_unreg_clk_plt; } + data->ether_clk_lookup = clkdev_hw_create(&data->clks[4]->hw, + "ether_clk", NULL); + if (!data->ether_clk_lookup) { + err = -ENOMEM; + goto err_drop_mclk; + } + plt_clk_free_parent_names_loop(parent_names, data->nparents); platform_set_drvdata(pdev, data); return 0; +err_drop_mclk: + clkdev_drop(data->mclk_lookup); err_unreg_clk_plt: plt_clk_unregister_loop(data, i); plt_clk_unregister_parents(data); @@ -369,6 +379,7 @@ static int plt_clk_remove(struct platform_device *pdev) data = platform_get_drvdata(pdev); + clkdev_drop(data->ether_clk_lookup); clkdev_drop(data->mclk_lookup); plt_clk_unregister_loop(data, PMC_CLK_NUM); plt_clk_unregister_parents(data);
Commit d31fd43c0f9a ("clk: x86: Do not gate clocks enabled by the firmware") causes all unclaimed PMC clocks on Cherry Trail devices to be on all the time, resulting on the device not being able to reach S0i2 or S0i3 when suspended. The reason for this commit is that on some Bay Trail / Cherry Trail devices the ethernet controller uses pmc_plt_clk_4. This commit adds an "ether_clk" alias, so that the relevant ethernet drivers can try to (optionally) use this, without needing X86 specific code / hacks, thus fixing ethernet on these devices without breaking S0i3 support. This commit uses clkdev_hw_create() to create the alias, mirroring the code for the already existing "mclk" alias for pmc_plt_clk_3. Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=193891#c102 Cc: Johannes Stezenbach <js@sig21.net> Cc: Carlo Caione <carlo@endlessm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> --- drivers/clk/x86/clk-pmc-atom.c | 11 +++++++++++ 1 file changed, 11 insertions(+)