From patchwork Tue May 1 16:12:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 907105 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=csie.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40b6D36CzZz9s21 for ; Wed, 2 May 2018 02:23:47 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756197AbeEAQXe (ORCPT ); Tue, 1 May 2018 12:23:34 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:37572 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755771AbeEAQXb (ORCPT ); Tue, 1 May 2018 12:23:31 -0400 Received: by wens.csie.org (Postfix, from userid 1000) id 829F85FE8A; Wed, 2 May 2018 00:15:17 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard , Michael Turquette , Stephen Boyd , Giuseppe Cavallaro , Rob Herring , Mark Rutland , Mark Brown Cc: Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Corentin Labbe , Icenowy Zheng Subject: [PATCH net-next v2 13/15] ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller Date: Wed, 2 May 2018 00:12:25 +0800 Message-Id: <20180501161227.2110-14-wens@csie.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501161227.2110-1-wens@csie.org> References: <20180501161227.2110-1-wens@csie.org> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Bananapi M2 Ultra has a Realtek RTL8211E RGMII PHY tied to the GMAC. The PMIC's DC1SW output provides power for the PHY, while the ALDO2 output provides I/O voltages on both sides. Signed-off-by: Chen-Yu Tsai --- .../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index c6da21e43572..25fb048c7df2 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -51,6 +51,7 @@ compatible = "sinovoip,bpi-m2-ultra", "allwinner,sun8i-r40"; aliases { + ethernet0 = &gmac; serial0 = &uart0; }; @@ -101,6 +102,22 @@ status = "okay"; }; +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy-handle = <&phy1>; + phy-mode = "rgmii"; + phy-supply = <®_dc1sw>; + status = "okay"; +}; + +&gmac_mdio { + phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + &i2c0 { status = "okay"; @@ -149,6 +166,13 @@ status = "okay"; }; +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vcc-pa"; +}; + ®_aldo3 { regulator-always-on; regulator-min-microvolt = <2700000>; @@ -156,6 +180,12 @@ regulator-name = "avcc"; }; +®_dc1sw { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-gmac-phy"; +}; + ®_dcdc1 { regulator-always-on; regulator-min-microvolt = <3000000>;