From patchwork Mon Dec 18 09:44:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 849945 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="lxdsCVME"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z0bmC2JjWz9s4q for ; Mon, 18 Dec 2017 20:47:07 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933673AbdLRJqf (ORCPT ); Mon, 18 Dec 2017 04:46:35 -0500 Received: from mail-wr0-f195.google.com ([209.85.128.195]:42543 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758553AbdLRJo6 (ORCPT ); Mon, 18 Dec 2017 04:44:58 -0500 Received: by mail-wr0-f195.google.com with SMTP id s66so13427811wrc.9 for ; Mon, 18 Dec 2017 01:44:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GtweTir+f4z1Z60UugjOzgbytYOQ0oWOM6id0Zorle4=; b=lxdsCVMEffPtjoOttRVGck53LkylDmhwDfEidspO/9Tb24brdxUygbrHSodr6ISDvO 1i7CcWKb3F1AgTf4gIWFKrwKQ28kKXNMzREFuTNtqeMgJZfPFUkaH0PXMdGJMUrgbVIF eyGGHKjeL4KKZ2GtesFIN91QsYf44V5QUWRzSadF0HEX/YIrQSRM0U6SUg9GZI7MxIAB YkXx5cvegmfnIlLkcSXQLH/XIh8Y68iyg2zjZa1yoofDjJQXZLyiSh72zQrP52NzB8aD DKdVupQW3FPBy9C9n7k+UsttceTOy/bRH8ORo+fRTEsMUlcCp5mPjvXwMItNNse6SIYm ty+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GtweTir+f4z1Z60UugjOzgbytYOQ0oWOM6id0Zorle4=; b=ExmOB1fVuHKQTH6YMOraAOYSXo8WkjN8lkQ8t1pN0DwCUsvupr3EAspsIt3bYY86bf 5b6tqh5G5ViwhjnWKNh3ljL392osRb2YcbeEn8hYouxR4kyVsi7V0a502U2/xafnro6q hZ1UEYLb2GdjanYKNWoIHWWjCNERjAqs5y+gR1b+AIsb173+5SFpdW5PTAlBQWgB+Ip+ RbPrVyZe64/Gc68XZ5uIh6agEG/Hmyz9JKaKvE2vv8jWfLsbnAmtqvnOeyxEc5TGxa3R gG4DstwgYaxJOuckT7802dV4FDqS8jCX2SyMpO5uikb6RnrESCqYP8XlyJ4JaNHTrSUU bikQ== X-Gm-Message-State: AKGB3mJUlOjosXKmVaNyG3CLCc7tc1b59avHrdSiZ0Off4GQ+XskRvmO jN9J8/lLGl8JFbnvyKPdDU6nEMNx X-Google-Smtp-Source: ACJfBosNbfwFUFJF/FuhqsFCxgIKq0EFAI2efm/K2gteWk3KBHSk/F+icZXFpHXvtviBYVgp/uQ0kg== X-Received: by 10.223.136.56 with SMTP id d53mr5776814wrd.36.1513590297277; Mon, 18 Dec 2017 01:44:57 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id p13sm12820783wrc.61.2017.12.18.01.44.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Dec 2017 01:44:56 -0800 (PST) From: Jerome Brunet To: Andrew Lunn , Florian Fainelli Cc: Jerome Brunet , Kevin Hilman , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v3 5/7] net: phy: meson-gxl: leave CONFIG_A6 untouched Date: Mon, 18 Dec 2017 10:44:44 +0100 Message-Id: <20171218094446.31912-6-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218094446.31912-1-jbrunet@baylibre.com> References: <20171218094446.31912-1-jbrunet@baylibre.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The PHY performs just as well when left in its default configuration and it makes senses because this poke gets reset just after init. According to the documentation, all registers in the Analog/DSP bank are reset when there is a mode switch from 10BT to 100BT. The bank is also reset on power down and soft reset, so we will never see the value which may have been set by the bootloader. In the end, we have used the default configuration so far and there is no reason to change now. Remove CONFIG_A6 poke to make this clear. Reviewed-by: Andrew Lunn Signed-off-by: Jerome Brunet --- drivers/net/phy/meson-gxl.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c index 0a34656a2086..ddc92424e8de 100644 --- a/drivers/net/phy/meson-gxl.c +++ b/drivers/net/phy/meson-gxl.c @@ -38,9 +38,6 @@ #define BANK_WOL 1 #define BANK_BIST 3 -/* Analog/DSP Registers */ -#define A6_CONFIG_REG 0x17 - /* WOL Registers */ #define LPI_STATUS 0xc #define LPI_STATUS_RSV12 BIT(12) @@ -126,12 +123,6 @@ static int meson_gxl_config_init(struct phy_device *phydev) { int ret; - /* Write CONFIG_A6*/ - ret = meson_gxl_write_reg(phydev, BANK_ANALOG_DSP, A6_CONFIG_REG, - 0x8e0d); - if (ret) - return ret; - /* Enable fractional PLL */ ret = meson_gxl_write_reg(phydev, BANK_BIST, FR_PLL_CONTROL, 0x5); if (ret)