From patchwork Wed Aug 2 09:34:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Gorski X-Patchwork-Id: 796577 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Sw/jmBnv"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xMp2c1MCXz9t0F for ; Wed, 2 Aug 2017 19:35:36 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752832AbdHBJfe (ORCPT ); Wed, 2 Aug 2017 05:35:34 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:34886 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752801AbdHBJfS (ORCPT ); Wed, 2 Aug 2017 05:35:18 -0400 Received: by mail-wr0-f196.google.com with SMTP id c24so3233040wra.2; Wed, 02 Aug 2017 02:35:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FBXoWTg5O080xd1FmyDUNsYoOeiodf0YZmKv1VSIRmQ=; b=Sw/jmBnv+3d9DSdkL1NwrY2K+iDrNXTag4eo/gnyck+zVR0qZGIssfHxdBJBF76d7J LVdbX4DptvmCpu0nmDOqWfTgZp1RS2AcwI2B7VUgIRYnbHQt0hFG4ufeDsnknsaXEUHC Nw8k2bxDf7U0wR9nlPAcEWprxyIIZM0viC1HCs7hxVBflu/Srn8u/WWcqllhCUmDj+1E C0snG7JuPGKl4dckM9I5C5X66lkhyIjjJA4BsQMgZIJ9Rsm0S7ATc2rSvVN9fbkK4LrR roLVqQKknqY+mE6pvBEq1AoRGo3giQAHhwCyTXaC6WjR+VnD42sqJxySHv6m2Nj+LtNg igVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FBXoWTg5O080xd1FmyDUNsYoOeiodf0YZmKv1VSIRmQ=; b=hjwq8IsAshtEAeca2xq8fJz7VHByC4s76S2u8RsGJlzz6PBjbX7GD8ErWaQ8CXDJW/ GN5QwZf7Q8pmZ5WG11t9y1kVO7L5ZlxtnWHkatvHQET40nKHF17oOsa0NkFFKbLVCGlZ mMI9SmedFcg7pgocqDHuwXfODEK+aQqzVuFG88r2IxpM8PLiNCTsRlAff1u+0ILBMUXU lnU5VthKn0V3ZMFgDkcQBHUxlRyWaBRj8uqc8MlDlllHDCpJQOgkqKghgJdN12aDar9X M0XQP9PHYFqvHaLJY88p23oyl1xgv83NAen+1Xrw/j1jz48yXjZTONDpvhmE8jXKIL3H NR7Q== X-Gm-Message-State: AIVw113WuLQS3OCOXFE3JEva+lnW08PZ/1QH43rpNxTYAicAyBJ/UFQ2 cN+uC44DWvM45A== X-Received: by 10.223.172.230 with SMTP id o93mr18959092wrc.273.1501666517281; Wed, 02 Aug 2017 02:35:17 -0700 (PDT) Received: from localhost.localdomain ([2001:470:9e39::48e]) by smtp.gmail.com with ESMTPSA id 91sm32058876wrg.83.2017.08.02.02.35.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Aug 2017 02:35:16 -0700 (PDT) From: Jonas Gorski To: linux-mips@linux-mips.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org Cc: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Ralf Baechle , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, Kevin Cernekee , Jiri Slaby , "David S. Miller" , Russell King Subject: [PATCH 7/8] MIPS: BCM63XX: move the HSSPI PLL HZ into its own clock Date: Wed, 2 Aug 2017 11:34:28 +0200 Message-Id: <20170802093429.12572-8-jonas.gorski@gmail.com> X-Mailer: git-send-email 2.13.2 In-Reply-To: <20170802093429.12572-1-jonas.gorski@gmail.com> References: <20170802093429.12572-1-jonas.gorski@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Split up the HSSPL clock into rate and a gate clock, to more closely match the actual hardware. Signed-off-by: Jonas Gorski --- arch/mips/bcm63xx/clk.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index 8a089a92e029..884099de097f 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -248,6 +248,10 @@ static struct clk clk_hsspi = { .set = hsspi_set, }; +/* + * HSSPI PLL + */ +static struct clk clk_hsspi_pll; /* * XTM clock @@ -379,6 +383,7 @@ static struct clk_lookup bcm6328_clks[] = { CLKDEV_INIT(NULL, "periph", &clk_periph), CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), /* gated clocks */ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), CLKDEV_INIT(NULL, "usbh", &clk_usbh), @@ -452,6 +457,7 @@ static struct clk_lookup bcm6362_clks[] = { CLKDEV_INIT(NULL, "periph", &clk_periph), CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), /* gated clocks */ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), CLKDEV_INIT(NULL, "usbh", &clk_usbh), @@ -486,7 +492,7 @@ static int __init bcm63xx_clk_init(void) clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); break; case BCM6328_CPU_ID: - clk_hsspi.rate = HSSPI_PLL_HZ_6328; + clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328; clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); break; case BCM6338_CPU_ID: @@ -502,7 +508,7 @@ static int __init bcm63xx_clk_init(void) clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); break; case BCM6362_CPU_ID: - clk_hsspi.rate = HSSPI_PLL_HZ_6362; + clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362; clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); break; case BCM6368_CPU_ID: