From patchwork Wed Aug 2 09:34:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Gorski X-Patchwork-Id: 796581 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="BQFd/dEH"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xMp3769Rnz9t0F for ; Wed, 2 Aug 2017 19:36:03 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752882AbdHBJgB (ORCPT ); Wed, 2 Aug 2017 05:36:01 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:35122 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752352AbdHBJfJ (ORCPT ); Wed, 2 Aug 2017 05:35:09 -0400 Received: by mail-wm0-f67.google.com with SMTP id r77so6432205wmd.2; Wed, 02 Aug 2017 02:35:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b4AFicNG/LgIJ3VrO0fmYbU9hIX3ld1RtDve/fmTYfo=; b=BQFd/dEHknLI+Bkb+jgEJCxEkSNF0u2BtHxXswgtqMTl6/hm1pFwRDgkxqpovsph7l 49xPm/yf4XCuUI3feq4INHxUj8wWCVl8825q3Vef9GnuH8MWUbb3myJJSLo6TJ82VhLC fm+TR6p0/UGPTFzklUXavc6wB6S9ruaNIT0TKpMjWC015en151Mln8gzqwbaSSD/sgZa q6lWQ8+WioX0fCGJDf7sOaFdqV7VkQbJGSjyvufw3imO63poQm/56BQ2mGjerJOhiU7z cBfrMrGz7RaNMLM2u3HKQ1X0YZ/7LK4KebhjGx2zgZ175VgnqsPmR/WxeecyHDTwCcaw fDEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b4AFicNG/LgIJ3VrO0fmYbU9hIX3ld1RtDve/fmTYfo=; b=rUbhVYm0S4Sium/WUSrbNTpCw9Dr9nMefWSrE0Cc8klLSy+0TWX6+aFdehbbaDJKlB GMdULfBGLBb+abR2Zy+xan5YBLC/7my1WjRtFuLAk1ds9SLbTzIH3YbtBMQCoOaiMSfA iW+fVDaIgnJPI8MgRA2JUXr8y3azAcRz0HhZHFmt1sUxDGTlGjVTCURviJX0ECsz+e/g 76gdcSNsGRo52iuzPCI94t9MgZqPBHolSA6/TEsRjGfNwzehnfHwWCxraEEOYN5TJ87c anuSag2p5C8fEnzwbY1M3SXLl3uPKqtdS9ZY/7hKshvyCDZ8qJsh4Mj24bUVTmtiRgnQ LOBg== X-Gm-Message-State: AIVw112uRnIH78PGlTYrZmsjLeMfAxl2Oob2Stt8fujENIfmbAONERcw rIJDyfUvIHlJ+A== X-Received: by 10.28.34.130 with SMTP id i124mr3283026wmi.137.1501666508060; Wed, 02 Aug 2017 02:35:08 -0700 (PDT) Received: from localhost.localdomain ([2001:470:9e39::48e]) by smtp.gmail.com with ESMTPSA id 91sm32058876wrg.83.2017.08.02.02.35.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Aug 2017 02:35:07 -0700 (PDT) From: Jonas Gorski To: linux-mips@linux-mips.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org Cc: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Ralf Baechle , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, Kevin Cernekee , Jiri Slaby , "David S. Miller" , Russell King Subject: [PATCH 1/8] MIPS: BCM63XX: add clkdev lookup support Date: Wed, 2 Aug 2017 11:34:22 +0200 Message-Id: <20170802093429.12572-2-jonas.gorski@gmail.com> X-Mailer: git-send-email 2.13.2 In-Reply-To: <20170802093429.12572-1-jonas.gorski@gmail.com> References: <20170802093429.12572-1-jonas.gorski@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Enable clkdev lookup support to allow us providing clocks under different names to devices more easily, so we don't need to care about clock name clashes anymore. Signed-off-by: Jonas Gorski --- arch/mips/Kconfig | 1 + arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++----------- 2 files changed, 116 insertions(+), 35 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8dd20358464f..1bc4c5e1fc8e 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -275,6 +275,7 @@ config BCM63XX select GPIOLIB select HAVE_CLK select MIPS_L1_CACHE_SHIFT_4 + select CLKDEV_LOOKUP help Support for BCM63XX based boards diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index 73626040e4d6..eb1cb0bf930b 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -356,44 +357,103 @@ long clk_round_rate(struct clk *clk, unsigned long rate) } EXPORT_SYMBOL_GPL(clk_round_rate); -struct clk *clk_get(struct device *dev, const char *id) -{ - if (!strcmp(id, "enet0")) - return &clk_enet0; - if (!strcmp(id, "enet1")) - return &clk_enet1; - if (!strcmp(id, "enetsw")) - return &clk_enetsw; - if (!strcmp(id, "ephy")) - return &clk_ephy; - if (!strcmp(id, "usbh")) - return &clk_usbh; - if (!strcmp(id, "usbd")) - return &clk_usbd; - if (!strcmp(id, "spi")) - return &clk_spi; - if (!strcmp(id, "hsspi")) - return &clk_hsspi; - if (!strcmp(id, "xtm")) - return &clk_xtm; - if (!strcmp(id, "periph")) - return &clk_periph; - if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm")) - return &clk_pcm; - if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec")) - return &clk_ipsec; - if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie")) - return &clk_pcie; - return ERR_PTR(-ENOENT); -} +static struct clk_lookup bcm3368_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), +}; -EXPORT_SYMBOL(clk_get); +static struct clk_lookup bcm6328_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), + CLKDEV_INIT(NULL, "pcie", &clk_pcie), +}; -void clk_put(struct clk *clk) -{ -} +static struct clk_lookup bcm6338_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), +}; + +static struct clk_lookup bcm6345_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), +}; + +static struct clk_lookup bcm6348_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), +}; -EXPORT_SYMBOL(clk_put); +static struct clk_lookup bcm6358_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), +}; + +static struct clk_lookup bcm6362_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), + CLKDEV_INIT(NULL, "pcie", &clk_pcie), + CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), +}; + +static struct clk_lookup bcm6368_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "xtm", &clk_xtm), + CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), +}; #define HSSPI_PLL_HZ_6328 133333333 #define HSSPI_PLL_HZ_6362 400000000 @@ -401,11 +461,31 @@ EXPORT_SYMBOL(clk_put); static int __init bcm63xx_clk_init(void) { switch (bcm63xx_get_cpu_id()) { + case BCM3368_CPU_ID: + clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); + break; case BCM6328_CPU_ID: clk_hsspi.rate = HSSPI_PLL_HZ_6328; + clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); + break; + case BCM6338_CPU_ID: + clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks)); + break; + case BCM6345_CPU_ID: + clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks)); + break; + case BCM6348_CPU_ID: + clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks)); + break; + case BCM6358_CPU_ID: + clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); break; case BCM6362_CPU_ID: clk_hsspi.rate = HSSPI_PLL_HZ_6362; + clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); + break; + case BCM6368_CPU_ID: + clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks)); break; }