From patchwork Thu Jul 20 21:41:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roland Dreier X-Patchwork-Id: 791772 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=purestorage.com header.i=@purestorage.com header.b="QwsZ3TZE"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xD6lq0FTbz9s83 for ; Fri, 21 Jul 2017 07:41:11 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965477AbdGTVlI (ORCPT ); Thu, 20 Jul 2017 17:41:08 -0400 Received: from mail-pf0-f175.google.com ([209.85.192.175]:35764 "EHLO mail-pf0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965209AbdGTVlH (ORCPT ); Thu, 20 Jul 2017 17:41:07 -0400 Received: by mail-pf0-f175.google.com with SMTP id e199so16526022pfh.2 for ; Thu, 20 Jul 2017 14:41:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=purestorage.com; s=google; h=sender:from:to:cc:subject:date:message-id; bh=ebnn8EHwQNh4iJRLzfR6PBY5RwyPZha2yP52ajOl2ks=; b=QwsZ3TZE0mFgxHrzlPiQAtl0oyQggbauvmFHeOSPaxgLaXUnCLi8DnbDSS1IES7Q5j Zj6l9Dpd5s6ZgNIOqBEDMgzDp89+W0VluIiBwQie+OokZpYDIvOYi5SwAdIvnZqhmRbM 9fFztqZq9c/l+q6ghslgQ8hbk/a95MHrRpqgM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=ebnn8EHwQNh4iJRLzfR6PBY5RwyPZha2yP52ajOl2ks=; b=FB8MSv/jqsY5Z+ddNKd6jaur7q6fo9hoRRWGa/492UFMD84geflOoA2vABRq7+M5Ev e9pszafi76+G6QEg3cSZD1KZHASLlYYjA6aytjxNVGxs5HzgCl3F0KfKZp70z+aGK2lj /DyTb6DLzTZqtlcEtW3QIiRRjwXdew2sm7qCEGWGzLG+5NG0NzYbr+ejyvgfHLIEAdsA ghJ6juI1fxoZIO8WikLfd1OzxrTRIezH3y0RygecPb72xv2GTjDQ1I9+Myy1xBnL5MYp mSgJklynrdtNBTz9c6rGSPHpWMyCbYp21RqTDSHzltH3Bae16eRTfynDIOCKG/l9Ni/e xbCA== X-Gm-Message-State: AIVw113D62vhE2M0QKlZ3tKNuLNPoiJXM37fokaWF3yQ8slYFLHeOwYn TF/5rU9nJKVBN9vL X-Received: by 10.84.175.3 with SMTP id s3mr5625666plb.161.1500586866868; Thu, 20 Jul 2017 14:41:06 -0700 (PDT) Received: from localhost.localdomain ([64.84.68.252]) by smtp.gmail.com with ESMTPSA id m68sm6252348pfi.12.2017.07.20.14.41.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Jul 2017 14:41:06 -0700 (PDT) From: Roland Dreier To: Bjorn Helgaas Cc: linux-pci@vger.kernel.org, netdev@vger.kernel.org, Emil Tantilov Subject: [PATCH] PCI: Update ACS quirk for more Intel 10G NICs Date: Thu, 20 Jul 2017 14:41:01 -0700 Message-Id: <20170720214101.7449-1-roland@kernel.org> X-Mailer: git-send-email 2.11.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Roland Dreier Add one more variant of the 82599 plus the device IDs for X540 and X550 variants. Intel has confirmed that none of these devices does peer-to-peer between functions. The X540 and X550 have added ACS capabilities in their PCI config space, but the ACS control register is hard-wired to 0 for both devices, so we still need the quirk for IOMMU grouping to allow assignment of individual SR-IOV functions. Signed-off-by: Roland Dreier Acked-by: Emil Tantilov --- drivers/pci/quirks.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 6967c6b4cf6b..b939db671326 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4335,12 +4335,33 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_INTEL, 0x1507, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_INTEL, 0x1514, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_INTEL, 0x151C, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x1528, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_INTEL, 0x1529, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x154A, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_INTEL, 0x152A, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_INTEL, 0x154D, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_INTEL, 0x154F, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_INTEL, 0x1551, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_INTEL, 0x1558, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x1560, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x1563, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15AA, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15AB, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15AC, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15AD, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15AE, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15B0, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15AB, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15C2, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15C3, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15C4, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15C6, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15C7, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15C8, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15CE, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15E4, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15E5, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15D1, pci_quirk_mf_endpoint_acs }, /* 82580 */ { PCI_VENDOR_ID_INTEL, 0x1509, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_INTEL, 0x150E, pci_quirk_mf_endpoint_acs },