From patchwork Wed Aug 15 19:12:52 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Leroy X-Patchwork-Id: 178023 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 24B6C2C0087 for ; Fri, 17 Aug 2012 00:59:34 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757283Ab2HPO7K (ORCPT ); Thu, 16 Aug 2012 10:59:10 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:34649 "EHLO mailhub1.si.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753001Ab2HPO7I (ORCPT ); Thu, 16 Aug 2012 10:59:08 -0400 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 657901C8407; Thu, 16 Aug 2012 15:59:04 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from mailhub1.si.c-s.fr ([192.168.12.234]) by localhost (mailhub1.c-s.fr [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4mSAdeBw8zyD; Thu, 16 Aug 2012 15:59:04 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 445171C8406; Thu, 16 Aug 2012 15:59:04 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id B5AD023DC4; Thu, 16 Aug 2012 16:59:06 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id etny11MOOY4r; Thu, 16 Aug 2012 16:59:06 +0200 (CEST) Received: from localhost.localdomain (unknown [172.25.231.42]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by messagerie.si.c-s.fr (Postfix) with ESMTP id 79A6B23DC3; Thu, 16 Aug 2012 16:59:06 +0200 (CEST) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by localhost.localdomain (8.13.8/8.13.8) with ESMTP id q7FJCqVF008950; Wed, 15 Aug 2012 21:12:52 +0200 Received: (from root@localhost) by localhost.localdomain (8.13.8/8.13.8/Submit) id q7FJCqiY008947; Wed, 15 Aug 2012 21:12:52 +0200 Date: Wed, 15 Aug 2012 21:12:52 +0200 Message-Id: <201208151912.q7FJCqiY008947@localhost.localdomain> From: Christophe Leroy To: netdev@vger.kernel.org CC: linux-kernel@vger.kernel.org Subject: [PATCH] lxt PHY: Support for the buggy LXT973 rev A2 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Hello, This patch adds proper handling of the buggy revision A2 of LXT973 phy, adding precautions linked to ERRATA Item 4: Item 4: MDIO Interface and Repeated Polling Problem: Repeated polling of odd-numbered registers via the MDIO interface randomly returns the contents of the previous even register. Implication: Managed applications may not obtain the correct register contents when a particular register is monitored for device status. Workaround: None. Status: This erratum has been previously fixed (in rev A3) Signed-off-by: Christophe Leroy --- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff -u linux-3.5-vanilla/drivers/net/phy/lxt.c linux-3.5/drivers/net/phy/lxt.c --- linux-3.5-vanilla/drivers/net/phy/lxt.c 2012-07-21 22:58:29.000000000 +0200 +++ linux-3.5/drivers/net/phy/lxt.c 2012-04-21 17:08:21.000000000 +0200 @@ -7,6 +7,10 @@ * * Copyright (c) 2004 Freescale Semiconductor, Inc. * + * Copyright (c) 2010 CSSI + * + * Added support for buggy LXT973 rev A2 + * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your @@ -56,6 +60,10 @@ /* register definitions for the 973 */ #define MII_LXT973_PCR 16 /* Port Configuration Register */ #define PCR_FIBER_SELECT 1 +#define MII_LXT973_SFR 27 /* Special Function Register */ + +#define PHYDEV_PRIV_FIBER 1 +#define PHYDEV_PRIV_REVA2 2 MODULE_DESCRIPTION("Intel LXT PHY driver"); MODULE_AUTHOR("Andy Fleming"); @@ -99,6 +107,9 @@ return err; } +/* register definitions for the 973 */ +#define MII_LXT973_PCR 16 /* Port Configuration Register */ +#define PCR_FIBER_SELECT 1 static int lxt971_ack_interrupt(struct phy_device *phydev) { @@ -122,9 +133,141 @@ return err; } +/** + * ERRATA on LXT973 + * + * Item 4: MDIO Interface and Repeated Polling + * Problem: Repeated polling of odd-numbered registers via the MDIO interface randomly returns the + * contents of the previous even register. + * Implication: Managed applications may not obtain the correct register contents when a particular + * register is monitored for device status. + * Workaround: None. + * Status: This erratum has been previously fixed (in rev A3) + * + */ + +static int lxt973a2_update_link(struct phy_device *phydev) +{ + int status; + int control; + int retry = 8; /* we try 8 times */ + + /* Do a fake read */ + status = phy_read(phydev, MII_BMSR); + + if (status < 0) + return status; + + control = phy_read(phydev, MII_BMCR); + if (control < 0) + return control; + + do { + /* Read link and autonegotiation status */ + status = phy_read(phydev, MII_BMSR); + } while (status>=0 && retry-- && status == control); + + if (status < 0) + return status; + + if ((status & BMSR_LSTATUS) == 0) + phydev->link = 0; + else + phydev->link = 1; + + return 0; +} + +int lxt973a2_read_status(struct phy_device *phydev) +{ + int adv; + int err; + int lpa; + int lpagb = 0; + + /* Update the link, but return if there + * was an error */ + err = lxt973a2_update_link(phydev); + if (err) + return err; + + if (AUTONEG_ENABLE == phydev->autoneg) { + int retry = 1; + + adv = phy_read(phydev, MII_ADVERTISE); + + if (adv < 0) + return adv; + + do { + lpa = phy_read(phydev, MII_LPA); + + if (lpa < 0) + return lpa; + + /* If both registers are equal, it is suspect but not impossible, hence a new try */ + } while (lpa == adv && retry--); + + lpa &= adv; + + phydev->speed = SPEED_10; + phydev->duplex = DUPLEX_HALF; + phydev->pause = phydev->asym_pause = 0; + + if (lpagb & (LPA_1000FULL | LPA_1000HALF)) { + phydev->speed = SPEED_1000; + + if (lpagb & LPA_1000FULL) + phydev->duplex = DUPLEX_FULL; + } else if (lpa & (LPA_100FULL | LPA_100HALF)) { + phydev->speed = SPEED_100; + + if (lpa & LPA_100FULL) + phydev->duplex = DUPLEX_FULL; + } else + if (lpa & LPA_10FULL) + phydev->duplex = DUPLEX_FULL; + + if (phydev->duplex == DUPLEX_FULL){ + phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; + phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; + } + } else { + int bmcr = phy_read(phydev, MII_BMCR); + if (bmcr < 0) + return bmcr; + + if (bmcr & BMCR_FULLDPLX) + phydev->duplex = DUPLEX_FULL; + else + phydev->duplex = DUPLEX_HALF; + + if (bmcr & BMCR_SPEED1000) + phydev->speed = SPEED_1000; + else if (bmcr & BMCR_SPEED100) + phydev->speed = SPEED_100; + else + phydev->speed = SPEED_10; + + phydev->pause = phydev->asym_pause = 0; + } + + return 0; +} + +static int lxt973_read_status(struct phy_device *phydev) +{ + return (int)phydev->priv&PHYDEV_PRIV_REVA2 ? lxt973a2_read_status(phydev) : genphy_read_status(phydev); +} + static int lxt973_probe(struct phy_device *phydev) { int val = phy_read(phydev, MII_LXT973_PCR); + int priv = 0; + + phydev->priv = NULL; + + if (val<0) return val; if (val & PCR_FIBER_SELECT) { /* @@ -136,17 +279,24 @@ val &= ~BMCR_ANENABLE; phy_write(phydev, MII_BMCR, val); /* Remember that the port is in fiber mode. */ - phydev->priv = lxt973_probe; - } else { - phydev->priv = NULL; + priv |= PHYDEV_PRIV_FIBER; } + val = phy_read(phydev, MII_PHYSID2); + + if (val<0) return val; + + if ((val & 0xf) == 0) { /* rev A2 */ + dev_info(&phydev->dev, " LXT973 revision A2 has bugs\n"); + priv |= PHYDEV_PRIV_REVA2; + } + phydev->priv = (void*)priv; return 0; } static int lxt973_config_aneg(struct phy_device *phydev) { /* Do nothing if port is in fiber mode. */ - return phydev->priv ? 0 : genphy_config_aneg(phydev); + return (int)phydev->priv&PHYDEV_PRIV_FIBER ? 0 : genphy_config_aneg(phydev); } static struct phy_driver lxt970_driver = { @@ -184,7 +334,10 @@ .flags = 0, .probe = lxt973_probe, .config_aneg = lxt973_config_aneg, - .read_status = genphy_read_status, + .read_status = lxt973_read_status, + .suspend = genphy_suspend, + .resume = genphy_resume, + .isolate = genphy_isolate, .driver = { .owner = THIS_MODULE,}, };