From patchwork Sun Nov 16 14:37:30 2008 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Buesch X-Patchwork-Id: 8986 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by ozlabs.org (Postfix) with ESMTP id 04805DDDF6 for ; Mon, 17 Nov 2008 02:26:47 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752193AbYKPP0m (ORCPT ); Sun, 16 Nov 2008 10:26:42 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751918AbYKPP0l (ORCPT ); Sun, 16 Nov 2008 10:26:41 -0500 Received: from bu3sch.de ([62.75.166.246]:49861 "EHLO vs166246.vserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751997AbYKPP0k (ORCPT ); Sun, 16 Nov 2008 10:26:40 -0500 Received: from p5b09fe80.dip.t-dialin.net ([91.9.254.128] helo=powermac.local) by vs166246.vserver.de with esmtpa (Exim 4.63) (envelope-from ) id 1L1jWH-00034f-9j; Sun, 16 Nov 2008 15:26:37 +0000 From: Michael Buesch To: Jeff Garzik Subject: [PATCH] b44: Unconditionally enable interrupt routing on reset Date: Sun, 16 Nov 2008 15:37:30 +0100 User-Agent: KMail/1.9.6 (enterprise 0.20070907.709405) Cc: netdev@vger.kernel.org, Pantelis Koukousoulas , Gary Zambrano MIME-Version: 1.0 Content-Disposition: inline Message-Id: <200811161537.30404.mb@bu3sch.de> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Unconditionally setup the IRQ routing on chip reset. It's safe to call ssb_pcicore_dev_irqvecs_enable() unconditionally, because it has internal checks for redundant calls. This fixes problems where hardware will not come up properly due to quirks in the enable-bit hardware. Reported-by: Pantelis Koukousoulas Signed-off-by: Michael Buesch Reported-by: Pantelis Koukousoulas Signed-off-by: Michael Buesch --- I'm not sure if we should push this for 2.6.28. This fixes quirks when booting from PXE. So only a minority of the b44 users are affected. Index: wireless-testing/drivers/net/b44.c =================================================================== --- wireless-testing.orig/drivers/net/b44.c 2008-11-16 14:47:06.000000000 +0100 +++ wireless-testing/drivers/net/b44.c 2008-11-16 15:03:35.000000000 +0100 @@ -1266,8 +1266,14 @@ static void b44_clear_stats(struct b44 * static void b44_chip_reset(struct b44 *bp, int reset_kind) { struct ssb_device *sdev = bp->sdev; + bool was_enabled; - if (ssb_device_is_enabled(bp->sdev)) { + was_enabled = ssb_device_is_enabled(bp->sdev); + + ssb_device_enable(bp->sdev, 0); + ssb_pcicore_dev_irqvecs_enable(&sdev->bus->pcicore, sdev); + + if (was_enabled) { bw32(bp, B44_RCV_LAZY, 0); bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE); b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 200, 1); @@ -1279,10 +1285,8 @@ static void b44_chip_reset(struct b44 *b } bw32(bp, B44_DMARX_CTRL, 0); bp->rx_prod = bp->rx_cons = 0; - } else - ssb_pcicore_dev_irqvecs_enable(&sdev->bus->pcicore, sdev); + } - ssb_device_enable(bp->sdev, 0); b44_clear_stats(bp); /*