diff mbox series

[net-next,v3,7/7] arm64: dts: add serdes and mdio description

Message ID 1592832924-31733-8-git-send-email-florinel.iordache@nxp.com
State Changes Requested
Delegated to: David Miller
Headers show
Series net: ethernet backplane support on DPAA1 | expand

Commit Message

Florinel Iordache June 22, 2020, 1:35 p.m. UTC
Add dt nodes with serdes, lanes, mdio generic description for supported
platform: ls1046. This is a prerequisite to enable backplane on device
tree for these platforms.

Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi     | 33 +++++++++++++++++++++-
 .../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi    |  5 ++--
 .../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi    |  5 ++--
 3 files changed, 38 insertions(+), 5 deletions(-)

Comments

Florian Fainelli June 26, 2020, 7:08 p.m. UTC | #1
On 6/22/20 6:35 AM, Florinel Iordache wrote:
> Add dt nodes with serdes, lanes, mdio generic description for supported
> platform: ls1046. This is a prerequisite to enable backplane on device
> tree for these platforms.
> 
> Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
> ---

[snip]

> @@ -21,7 +22,7 @@ fman@1a00000 {
>  		fsl,fman-10g-port;
>  	};
>  
> -	ethernet@f2000 {
> +	mac10: ethernet@f2000 {
>  		cell-index = <0x9>;
>  		compatible = "fsl,fman-memac";
>  		reg = <0xf2000 0x1000>;
> @@ -29,7 +30,7 @@ fman@1a00000 {
>  		pcsphy-handle = <&pcsphy7>;
>  	};
>  
> -	mdio@f3000 {
> +	mdio10: mdio@f3000 {
>  		#address-cells = <1>;
>  		#size-cells = <0>;
>  		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";

That part of the patch does not seem to have any users, there is nothing
in your patch series that references mac9, mdio9 or mac10, mdio10
AFAICT. Maybe you can split it up and send it aside from this series?
Florinel Iordache June 29, 2020, 12:32 p.m. UTC | #2
> -----Original Message-----
> From: Florian Fainelli <f.fainelli@gmail.com>
> Sent: Friday, June 26, 2020 10:08 PM
> To: Florinel Iordache <florinel.iordache@nxp.com>; davem@davemloft.net;
> netdev@vger.kernel.org; andrew@lunn.ch; hkallweit1@gmail.com;
> linux@armlinux.org.uk
> Cc: devicetree@vger.kernel.org; linux-doc@vger.kernel.org;
> robh+dt@kernel.org; mark.rutland@arm.com; kuba@kernel.org;
> corbet@lwn.net; shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; Madalin
> Bucur (OSS) <madalin.bucur@oss.nxp.com>; Ioana Ciornei
> <ioana.ciornei@nxp.com>; linux-kernel@vger.kernel.org
> Subject: [EXT] Re: [PATCH net-next v3 7/7] arm64: dts: add serdes and mdio
> description
> 
> Caution: EXT Email
> 
> On 6/22/20 6:35 AM, Florinel Iordache wrote:
> > Add dt nodes with serdes, lanes, mdio generic description for
> > supported
> > platform: ls1046. This is a prerequisite to enable backplane on device
> > tree for these platforms.
> >
> > Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
> > ---
> 
> [snip]
> 
> > @@ -21,7 +22,7 @@ fman@1a00000 {
> >               fsl,fman-10g-port;
> >       };
> >
> > -     ethernet@f2000 {
> > +     mac10: ethernet@f2000 {
> >               cell-index = <0x9>;
> >               compatible = "fsl,fman-memac";
> >               reg = <0xf2000 0x1000>;
> > @@ -29,7 +30,7 @@ fman@1a00000 {
> >               pcsphy-handle = <&pcsphy7>;
> >       };
> >
> > -     mdio@f3000 {
> > +     mdio10: mdio@f3000 {
> >               #address-cells = <1>;
> >               #size-cells = <0>;
> >               compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
> 
> That part of the patch does not seem to have any users, there is nothing in your
> patch series that references mac9, mdio9 or mac10, mdio10 AFAICT. Maybe you
> can split it up and send it aside from this series?
> --
> Florian

Hi Florian,

These labels are used in the platform DTS (e.g.: fsl-ls1046a-rdb.dts for DPAA1 / LS1046).
They are not used in the patch because backplane mode is NOT the default mode.
Backplane mode is enabled by users for custom boards by editing the DTS.
Interfaces must be used by default with a PHY like: phy-handle = <&aqr106_phy>
How to enable backplane mode in DTS is described in devicetree bindings file: ethernet-phy.yaml
(which includes an example at the end).

Here is an example of how the labels are used to enable backplane mode:
&mdio9 {
	pcsphy6: ethernet-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c45";
		eq-algorithm = "bee";
		/* 10G Short cables setup: up to 30 cm cable */
		eq-init = <0x2 0x29 0x5>;
		eq-params = <0>;
		reg = <0x0>;
		lane-handle = <&lane_d>;   /* lane D */
	};
};
/* Update MAC connections to backplane PHYs */
&mac9 {
	phy-connection-type = "10gbase-kr";
	phy-handle = <&pcsphy6>;
};

However, the users could write DTS by using ethernet@f0000 instead of &mac9.
Something like this:
ethernet@f0000 { /* 10GEC1 */
	phy-connection-type = "10gbase-kr";
	phy-handle = <&pcsphy6>;
};
(and similar for mdio9/mdio10)
So ultimately that part of the patch could be removed indeed.
I put it there just to be more user friendly to enable backplane in DTS.

Thank you for feedback.
Florinel.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index d4c1da3..c7d845f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -3,7 +3,7 @@ 
  * Device Tree Include file for Freescale Layerscape-1046A family SoC.
  *
  * Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018, 2020 NXP
  *
  * Mingkai Hu <mingkai.hu@nxp.com>
  */
@@ -735,6 +735,37 @@ 
 			status = "disabled";
 		};
 
+		serdes1: serdes@1ea0000 {
+			compatible = "serdes-10g";
+			reg = <0x0 0x1ea0000 0 0x00002000>;
+			reg-names = "serdes", "serdes-10g";
+			big-endian;
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x00 0x1ea0000 0x00002000>;
+			lane_a: lane@800 {
+				compatible = "lane-10g";
+				reg = <0x800 0x40>;
+				reg-names = "lane", "serdes-lane";
+			};
+			lane_b: lane@840 {
+				compatible = "lane-10g";
+				reg = <0x840 0x40>;
+				reg-names = "lane", "serdes-lane";
+			};
+			lane_c: lane@880 {
+				compatible = "lane-10g";
+				reg = <0x880 0x40>;
+				reg-names = "lane", "serdes-lane";
+			};
+			lane_d: lane@8c0 {
+				compatible = "lane-10g";
+				reg = <0x8c0 0x40>;
+				reg-names = "lane", "serdes-lane";
+			};
+		};
+
 		pcie_ep@3600000 {
 			compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep";
 			reg = <0x00 0x03600000 0x0 0x00100000
diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
index dbd2fc3..d6191f1 100644
--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
@@ -3,6 +3,7 @@ 
  * QorIQ FMan v3 10g port #0 device tree
  *
  * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
  *
  */
 
@@ -21,7 +22,7 @@  fman@1a00000 {
 		fsl,fman-10g-port;
 	};
 
-	ethernet@f0000 {
+	mac9: ethernet@f0000 {
 		cell-index = <0x8>;
 		compatible = "fsl,fman-memac";
 		reg = <0xf0000 0x1000>;
@@ -29,7 +30,7 @@  fman@1a00000 {
 		pcsphy-handle = <&pcsphy6>;
 	};
 
-	mdio@f1000 {
+	mdio9: mdio@f1000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
 		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
index 6fc5d25..1f6f28f 100644
--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
@@ -3,6 +3,7 @@ 
  * QorIQ FMan v3 10g port #1 device tree
  *
  * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
  *
  */
 
@@ -21,7 +22,7 @@  fman@1a00000 {
 		fsl,fman-10g-port;
 	};
 
-	ethernet@f2000 {
+	mac10: ethernet@f2000 {
 		cell-index = <0x9>;
 		compatible = "fsl,fman-memac";
 		reg = <0xf2000 0x1000>;
@@ -29,7 +30,7 @@  fman@1a00000 {
 		pcsphy-handle = <&pcsphy7>;
 	};
 
-	mdio@f3000 {
+	mdio10: mdio@f3000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
 		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";