| Message ID | 1559860104-927-17-git-send-email-hancock@sedsystems.ca |
|---|---|
| State | Accepted |
| Delegated to: | David Miller |
| Headers | show |
| Series | Xilinx axienet driver updates (v5) | expand |
diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt index 0be335c..a8be67b 100644 --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt @@ -37,6 +37,9 @@ Optional properties: auto-detected from the CPU clock (but only on platforms where this is possible). New device trees should specify this - the auto detection is only for backward compatibility. + - mdio : Child node for MDIO bus. Must be defined if PHY access is + required through the core's MDIO interface (i.e. always, + unless the PHY is accessed through a different bus). Example: axi_ethernet_eth: ethernet@40c00000 {
The mdio child node for the MDIO bus is generally required when using this driver but was not documented other than being shown in the example. Document it as an optional (but usually required) parameter. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> --- Documentation/devicetree/bindings/net/xilinx_axienet.txt | 3 +++ 1 file changed, 3 insertions(+)