From patchwork Fri Feb 1 22:39:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiong Wang X-Patchwork-Id: 1035251 X-Patchwork-Delegate: bpf@iogearbox.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=netronome.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=netronome-com.20150623.gappssmtp.com header.i=@netronome-com.20150623.gappssmtp.com header.b="FoQti6Cl"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43rsVZ34Qzz9s4Z for ; Sat, 2 Feb 2019 09:39:50 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727069AbfBAWjt (ORCPT ); Fri, 1 Feb 2019 17:39:49 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:34658 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725850AbfBAWjs (ORCPT ); Fri, 1 Feb 2019 17:39:48 -0500 Received: by mail-wr1-f67.google.com with SMTP id f7so8810790wrp.1 for ; Fri, 01 Feb 2019 14:39:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=netronome-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=l8uLpVMsknOjfTWOEytvPbf1gLq0IJnqWeru4O1bAbE=; b=FoQti6Cl3Rda0v7e9zu7N9qzSaAINewnntAug+gxY7hdwwsHcmOTi1FXxsIKl2kA3y yw/B/h1qgjxziejWDnb8RO2R2f1E1qx2CRQNtOL4eseaM78QeCUOZFpFH6H/4zdl1ejp FHkXP0cwNnv2ENvbiD41p+JTqX3u94WUmhbkfhzD0RVDzmfuup1LgUB6ZF0BnreYSlZr SE9Rx7K09+P0vi8pakJLgvec34AcRP80mu6EbeEkXVUqd+aX0Q/SGyJYnnGJxsqZnzr0 1RldW4APxCH6KaJ3Q3SgVKEUyBzrZc9Tz25MYp2HBG6L6W+3wTKWdpl5auK6+kglaxVm 3rAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=l8uLpVMsknOjfTWOEytvPbf1gLq0IJnqWeru4O1bAbE=; b=oXcnQcbvX7e3+660+qczYwOz8B2Jv4ezq3BwyGxwuPIZYp5OWmk9X2Uy0hUB/2bBjY j74O07W68PCm7o1gWCSor0k2Tjw7jQaLdx70daCgO3DpsB2A2FpUS80+fvRDEbbRdaN4 B4xnfCXnUbyXSKQDanMyy0kyeAC/1I6K1o5V78UziVZxuoL4MCKWjASsVCP2/k8gF9uv 4JcTLCst7TQPUxDttT2EMYQviYHSczjAyvqyTZARJ28I9pMBNFR3kzpPqx9XpSETHEuB j4wDnawolXZ/ezDdxoul2TOLK+vWL5rnoMqufqEktrZdA+wHLG4o0Rx0IKeCIQkWRK0K qhOw== X-Gm-Message-State: AHQUAuYkQJJRUBnoZSYsbLP7K+A9PDnxcSEN8ptr29GdCOtBK7q85CJO vX09fvmo2td+haaqBSa9slhGKw== X-Google-Smtp-Source: AHgI3IY60+qZKs+D675DRyi1nGb7tbMi0DSkBqsZ9X99QA14YcI7emVOvCKpcKXZg8m8o2kkD907dg== X-Received: by 2002:adf:dd06:: with SMTP id a6mr10101569wrm.2.1549060785617; Fri, 01 Feb 2019 14:39:45 -0800 (PST) Received: from cbtest28.netronome.com ([217.38.71.146]) by smtp.gmail.com with ESMTPSA id t12sm7217326wrr.65.2019.02.01.14.39.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 14:39:44 -0800 (PST) From: Jiong Wang To: ast@kernel.org, daniel@iogearbox.net Cc: jakub.kicinski@netronome.com, netdev@vger.kernel.org, oss-drivers@netronome.com, Jiong Wang Subject: [PATCH bpf-next 1/2] nfp: bpf: correct the behavior for shifts by zero Date: Fri, 1 Feb 2019 22:39:28 +0000 Message-Id: <1549060769-20920-2-git-send-email-jiong.wang@netronome.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1549060769-20920-1-git-send-email-jiong.wang@netronome.com> References: <1549060769-20920-1-git-send-email-jiong.wang@netronome.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Shifts by zero do nothing, and should be treated as nops. Even though compiler is not supposed to generate such instructions and manual written assembly is unlikely to have them, but they are legal instructions and have defined behavior. This patch correct existing shifts code-gen to make sure they do nothing when shift amount is zero except when the instruction is ALU32 for which high bits need to be cleared. For shift amount bigger than type size, already, NFP JIT back-end errors out for immediate shift and only low 5 bits will be taken into account for indirect shift which is the same as x86. Reviewed-by: Jakub Kicinski Signed-off-by: Jiong Wang --- drivers/net/ethernet/netronome/nfp/bpf/jit.c | 30 ++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/netronome/nfp/bpf/jit.c b/drivers/net/ethernet/netronome/nfp/bpf/jit.c index aa3a209..093b8ff 100644 --- a/drivers/net/ethernet/netronome/nfp/bpf/jit.c +++ b/drivers/net/ethernet/netronome/nfp/bpf/jit.c @@ -1967,6 +1967,9 @@ static int neg_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) */ static int __shl_imm64(struct nfp_prog *nfp_prog, u8 dst, u8 shift_amt) { + if (!shift_amt) + return 0; + if (shift_amt < 32) { emit_shf(nfp_prog, reg_both(dst + 1), reg_a(dst + 1), SHF_OP_NONE, reg_b(dst), SHF_SC_R_DSHF, @@ -2079,6 +2082,9 @@ static int shl_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) */ static int __shr_imm64(struct nfp_prog *nfp_prog, u8 dst, u8 shift_amt) { + if (!shift_amt) + return 0; + if (shift_amt < 32) { emit_shf(nfp_prog, reg_both(dst), reg_a(dst + 1), SHF_OP_NONE, reg_b(dst), SHF_SC_R_DSHF, shift_amt); @@ -2180,6 +2186,9 @@ static int shr_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) */ static int __ashr_imm64(struct nfp_prog *nfp_prog, u8 dst, u8 shift_amt) { + if (!shift_amt) + return 0; + if (shift_amt < 32) { emit_shf(nfp_prog, reg_both(dst), reg_a(dst + 1), SHF_OP_NONE, reg_b(dst), SHF_SC_R_DSHF, shift_amt); @@ -2388,10 +2397,13 @@ static int neg_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) static int __ashr_imm(struct nfp_prog *nfp_prog, u8 dst, u8 shift_amt) { - /* Set signedness bit (MSB of result). */ - emit_alu(nfp_prog, reg_none(), reg_a(dst), ALU_OP_OR, reg_imm(0)); - emit_shf(nfp_prog, reg_both(dst), reg_none(), SHF_OP_ASHR, reg_b(dst), - SHF_SC_R_SHF, shift_amt); + if (shift_amt) { + /* Set signedness bit (MSB of result). */ + emit_alu(nfp_prog, reg_none(), reg_a(dst), ALU_OP_OR, + reg_imm(0)); + emit_shf(nfp_prog, reg_both(dst), reg_none(), SHF_OP_ASHR, + reg_b(dst), SHF_SC_R_SHF, shift_amt); + } wrp_immed(nfp_prog, reg_both(dst + 1), 0); return 0; @@ -2433,12 +2445,10 @@ static int shl_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) { const struct bpf_insn *insn = &meta->insn; - if (!insn->imm) - return 1; /* TODO: zero shift means indirect */ - - emit_shf(nfp_prog, reg_both(insn->dst_reg * 2), - reg_none(), SHF_OP_NONE, reg_b(insn->dst_reg * 2), - SHF_SC_L_SHF, insn->imm); + if (insn->imm) + emit_shf(nfp_prog, reg_both(insn->dst_reg * 2), + reg_none(), SHF_OP_NONE, reg_b(insn->dst_reg * 2), + SHF_SC_L_SHF, insn->imm); wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0); return 0;