From patchwork Wed May 23 06:20:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGFsIFZva8OhxI0=?= X-Patchwork-Id: 918746 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="LTMx/vz2"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40rMpr030vz9s1b for ; Wed, 23 May 2018 16:21:24 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754095AbeEWGVV (ORCPT ); Wed, 23 May 2018 02:21:21 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:36376 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754072AbeEWGVS (ORCPT ); Wed, 23 May 2018 02:21:18 -0400 Received: by mail-wr0-f193.google.com with SMTP id k5-v6so12108908wrn.3; Tue, 22 May 2018 23:21:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=m9hqKck/Im/zowdJc65WSmlbaIasQyWsk5Cf1BTovHc=; b=LTMx/vz2VeSv7foFSr1qVFfe2wFnSaEbW2mpec3SK7UiIBakfweakEqEkmV1vu3OC5 A2UBuY/qtHSccLZWafOC1W5IwfqYH5BdPt348e49eU6ULVNFBlggvHkoGEp9NG7W1/MZ WT4cxfRzhotwkymCYDrP67UvSaCfbYbGAttihCInSd57J39VoiHMg7oxoQn+9M95hHYz Xv0frZGUiFj8r3sU3kS4RWX27WuKVfQaNzM0S39VXQW7qP1WghOzNSpyrIwqQ8VSswhk FRdvOperoa6OwqJp/semhnEOjIYHUkE/hpbN/5LVE7Igz2AFExOwYRo1Zap8mfWlDDpK fYFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=m9hqKck/Im/zowdJc65WSmlbaIasQyWsk5Cf1BTovHc=; b=dBWDYh6cIzv8SAWrcvZ2halU5iN88P53YBuk5IptdrtNq3zF9f+rzYajb7eD0SvxOJ qeQ1zjzcvxo2qLUx7WW54vzpPrxL3SXGY4uzm3iIbYDIgLDgBrBH8KT/9Kr6crzQXBFG MWHnYvXaO6/TsdtJ3HZ0e8N3ubZ7OiLOmS54NNqVFdtukNzaV/UCHxU7+QxaXXSF7TIL IRzYUCdCdHPcXzhfpp+EaNnwlRje8kY+YqYAJKxzy8RErrMDEb2Qa1j5AiYpK22opham A2Om/z44n2X/cZPA0e9fXJ50rK9wmC6OD8MWq+569QZXXTyseJO/ruTSyin4c7T2YtTz SbJA== X-Gm-Message-State: ALKqPwdqy/yHEmdKDxw08yqfjhIeS4rI4a++BmJ7Em5/PPxXdJsXkpuq 9kgHQeUD/TVAv4vR1tyoaQFd/jIs X-Google-Smtp-Source: AB8JxZpoRKzoR1NDze3AfFCFQR2pim/gKyX1/LLCxmahNtlZ0EhGwfMVwjq9ZEJozIiUffoWog5UfQ== X-Received: by 2002:adf:9441:: with SMTP id 59-v6mr1085634wrq.194.1527056476630; Tue, 22 May 2018 23:21:16 -0700 (PDT) Received: from vokac-latitude.ysoft.local ([89.24.100.190]) by smtp.gmail.com with ESMTPSA id 38-v6sm43012912wry.61.2018.05.22.23.21.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 May 2018 23:21:15 -0700 (PDT) From: "=?UTF-8?q?Michal=20Vok=C3=A1=C4=8D?=" X-Google-Original-From: =?utf-8?b?TWljaGFsIFZva8OhxI0=?= To: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, f.fainelli@gmail.com, vivien.didelot@savoirfairelinux.com, andrew@lunn.ch, mark.rutland@arm.com, robh+dt@kernel.org, davem@davemloft.net, michal.vokac@ysoft.com Subject: [PATCH net-next v3 4/7] net: dsa: qca8k: Force CPU port to its highest bandwidth Date: Wed, 23 May 2018 08:20:21 +0200 Message-Id: <1527056424-14528-5-git-send-email-michal.vokac@ysoft.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527056424-14528-1-git-send-email-michal.vokac@ysoft.com> References: <1527056424-14528-1-git-send-email-michal.vokac@ysoft.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org By default autonegotiation is enabled to configure MAC on all ports. For the CPU port autonegotiation can not be used so we need to set some sensible defaults manually. This patch forces the default setting of the CPU port to 1000Mbps/full duplex which is the chip maximum capability. Also correct size of the bit field used to configure link speed. Fixes: 6b93fb46480a ("net-next: dsa: add new driver for qca8xxx family") Signed-off-by: Michal Vokáč Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli --- Changes in v3: - none Changes in v2: - Add "Fixes" tag as pointed out by Florian. - Add "Reviewed-by" tags from Andrew and Florian. drivers/net/dsa/qca8k.c | 6 +++++- drivers/net/dsa/qca8k.h | 6 ++++-- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 0d224f3..14a108b38 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -537,6 +537,7 @@ qca8k_setup(struct dsa_switch *ds) { struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; int ret, i, phy_mode = -1; + u32 mask; pr_debug("qca: setup\n"); @@ -564,7 +565,10 @@ qca8k_setup(struct dsa_switch *ds) if (ret < 0) return ret; - /* Enable CPU Port */ + /* Enable CPU Port, force it to maximum bandwidth and full-duplex */ + mask = QCA8K_PORT_STATUS_SPEED_1000 | QCA8K_PORT_STATUS_TXFLOW | + QCA8K_PORT_STATUS_RXFLOW | QCA8K_PORT_STATUS_DUPLEX; + qca8k_write(priv, QCA8K_REG_PORT_STATUS(QCA8K_CPU_PORT), mask); qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0, QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN); qca8k_port_set_status(priv, QCA8K_CPU_PORT, 1); diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index 1cf8a92..5bda165 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -51,8 +51,10 @@ #define QCA8K_GOL_MAC_ADDR0 0x60 #define QCA8K_GOL_MAC_ADDR1 0x64 #define QCA8K_REG_PORT_STATUS(_i) (0x07c + (_i) * 4) -#define QCA8K_PORT_STATUS_SPEED GENMASK(2, 0) -#define QCA8K_PORT_STATUS_SPEED_S 0 +#define QCA8K_PORT_STATUS_SPEED GENMASK(1, 0) +#define QCA8K_PORT_STATUS_SPEED_10 0 +#define QCA8K_PORT_STATUS_SPEED_100 0x1 +#define QCA8K_PORT_STATUS_SPEED_1000 0x2 #define QCA8K_PORT_STATUS_TXMAC BIT(2) #define QCA8K_PORT_STATUS_RXMAC BIT(3) #define QCA8K_PORT_STATUS_TXFLOW BIT(4)