From patchwork Tue Sep 5 18:16:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iyappan Subramanian X-Patchwork-Id: 810240 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=apm.com header.i=@apm.com header.b="ZDjuYeou"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xmw0b439xz9t16 for ; Wed, 6 Sep 2017 04:17:03 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752706AbdIESRB (ORCPT ); Tue, 5 Sep 2017 14:17:01 -0400 Received: from mail-pg0-f45.google.com ([74.125.83.45]:37014 "EHLO mail-pg0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752681AbdIESQw (ORCPT ); Tue, 5 Sep 2017 14:16:52 -0400 Received: by mail-pg0-f45.google.com with SMTP id d8so10797959pgt.4 for ; Tue, 05 Sep 2017 11:16:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=grbUuCbub/oTMHHwWts7g7KADeuwaY6FcLayG0JJZU8=; b=ZDjuYeouQ52oNXX/DkK4O6EaVvYiqWoXJe0zICWnNwRX2ICLfzY1KNdf9w5LBuZT7t tOl+f3HLljE67MfbkvCesRbVmrVWco22AuMjNq0Z/Zrmg1EVf1RlGGp8oO8EMDpF6E52 xME9WJJ4jrQPKzJX7x0fofftnnOY4z9Mc76s8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=grbUuCbub/oTMHHwWts7g7KADeuwaY6FcLayG0JJZU8=; b=La7upNRZvfmdk+8Sroh+dBf/RskxScSs2Bl1k4H0ek54Srn6YCBrcAW4v0OV1y1dql 6UZIaQvCtCX3j8Fwspl1VottqQ3B9R53d78J7dRJoDEdl/WixIuFNPvbiK2EfbhNKf02 aGaH7EooA1WVnwNplhPp/JpjpYyZA+FoauvpRE/j1JT+vdL4K9CTQIpYll/Uf2jUWbey vCm82CDdpM+7SoB1/nq6eVtbJ6Hvsaq/pjEA+qKGB15xN3zLF7cZjcqkNt6f2TAE+Z2U iHD13wjYHjAjOEme55S8WwXU3NLFOMj42VrjvY7xbq/YGwxkuwPYzpHIXxn5d7Jjkvn0 VhNQ== X-Gm-Message-State: AHPjjUgqbgIw/CgG/fUpk57B5Wp31rdYDgRaNcjbc7HQh4IxfuMt2T8v A4t3yAsOpB5AED30KTA= X-Google-Smtp-Source: ADKCNb78aBzK+R2ICI2uto+C8bywlr2mCMEG9edw7VnJbf/pXdTL3ULKXDlMpELih7p0kYoy8rTy0A== X-Received: by 10.101.64.10 with SMTP id f10mr4998450pgp.98.1504635411445; Tue, 05 Sep 2017 11:16:51 -0700 (PDT) Received: from isubrama-dev.amcc.com ([206.80.4.98]) by smtp.gmail.com with ESMTPSA id k195sm1912991pgc.4.2017.09.05.11.16.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 05 Sep 2017 11:16:50 -0700 (PDT) From: Iyappan Subramanian To: davem@davemloft.net, netdev@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, dnelson@redhat.com, patches@apm.com, Quan Nguyen , Iyappan Subramanian Subject: [PATCH 2/3] drivers: net: xgene: Configure tx/rx delay for ACPI Date: Tue, 5 Sep 2017 11:16:31 -0700 Message-Id: <1504635392-19089-3-git-send-email-isubramanian@apm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1504635392-19089-1-git-send-email-isubramanian@apm.com> References: <1504635392-19089-1-git-send-email-isubramanian@apm.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Quan Nguyen This patch fixes configuring tx/rx delay values for ACPI. Signed-off-by: Quan Nguyen Signed-off-by: Iyappan Subramanian --- drivers/net/ethernet/apm/xgene/xgene_enet_hw.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c index e45b587..3188f55 100644 --- a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c +++ b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c @@ -468,7 +468,6 @@ static void xgene_enet_configure_clock(struct xgene_enet_pdata *pdata) static void xgene_gmac_set_speed(struct xgene_enet_pdata *pdata) { - struct device *dev = &pdata->pdev->dev; u32 icm0, icm2, mc2; u32 intf_ctl, rgmii, value; @@ -500,10 +499,8 @@ static void xgene_gmac_set_speed(struct xgene_enet_pdata *pdata) intf_ctl |= ENET_GHD_MODE; CFG_MACMODE_SET(&icm0, 2); CFG_WAITASYNCRD_SET(&icm2, 0); - if (dev->of_node) { - CFG_TXCLK_MUXSEL0_SET(&rgmii, pdata->tx_delay); - CFG_RXCLK_MUXSEL0_SET(&rgmii, pdata->rx_delay); - } + CFG_TXCLK_MUXSEL0_SET(&rgmii, pdata->tx_delay); + CFG_RXCLK_MUXSEL0_SET(&rgmii, pdata->rx_delay); rgmii |= CFG_SPEED_1250; xgene_enet_rd_csr(pdata, DEBUG_REG_ADDR, &value);