From patchwork Tue Jul 4 10:47:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunsheng Lin X-Patchwork-Id: 783853 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3x20Lj1fm9z9s82 for ; Tue, 4 Jul 2017 20:17:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752192AbdGDKQw (ORCPT ); Tue, 4 Jul 2017 06:16:52 -0400 Received: from szxga02-in.huawei.com ([45.249.212.188]:9347 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751845AbdGDKQv (ORCPT ); Tue, 4 Jul 2017 06:16:51 -0400 Received: from 172.30.72.56 (EHLO dggeml406-hub.china.huawei.com) ([172.30.72.56]) by dggrg02-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id AQM39507; Tue, 04 Jul 2017 18:16:48 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by dggeml406-hub.china.huawei.com (10.3.17.50) with Microsoft SMTP Server id 14.3.301.0; Tue, 4 Jul 2017 18:16:41 +0800 From: Lin Yun Sheng To: CC: , , , , , , , , , , , , Subject: [PATCH net 2/3] net: hns: Fix a wrong op phy C45 code Date: Tue, 4 Jul 2017 18:47:32 +0800 Message-ID: <1499165253-184543-3-git-send-email-linyunsheng@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1499165253-184543-1-git-send-email-linyunsheng@huawei.com> References: <1499165253-184543-1-git-send-email-linyunsheng@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.595B6B11.000E, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: bba788c5cbf84dfdefd6773f13d1f34f Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Yunsheng Lin As the user manual described, the second step to write to C45 phy by mdio should be data, but not address. Here we should fix this issue. Signed-off-by: Yankejian Reviewed-by: lipeng Reviewed-by: Yunsheng Lin --- drivers/net/ethernet/hisilicon/hns_mdio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/hisilicon/hns_mdio.c b/drivers/net/ethernet/hisilicon/hns_mdio.c index e5221d9..017e084 100644 --- a/drivers/net/ethernet/hisilicon/hns_mdio.c +++ b/drivers/net/ethernet/hisilicon/hns_mdio.c @@ -261,7 +261,7 @@ static int hns_mdio_write(struct mii_bus *bus, /* config the data needed writing */ cmd_reg_cfg = devad; - op = MDIO_C45_WRITE_ADDR; + op = MDIO_C45_WRITE_DATA; } MDIO_SET_REG_FIELD(mdio_dev, MDIO_WDATA_REG, MDIO_WDATA_DATA_M,