From patchwork Sat Feb 4 15:47:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 724102 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vFync0lGXz9s75 for ; Sun, 5 Feb 2017 02:48:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751206AbdBDPsO (ORCPT ); Sat, 4 Feb 2017 10:48:14 -0500 Received: from mail-out.m-online.net ([212.18.0.9]:44298 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750851AbdBDPsN (ORCPT ); Sat, 4 Feb 2017 10:48:13 -0500 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 3vFyn44CNRz3hjgH; Sat, 4 Feb 2017 16:48:08 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.68]) by mail.m-online.net (Postfix) with ESMTP id 3vFyn421dwzvk9K; Sat, 4 Feb 2017 16:48:08 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.68]) (amavisd-new, port 10024) with ESMTP id l1EPxrPuY4HQ; Sat, 4 Feb 2017 16:48:06 +0100 (CET) X-Auth-Info: L87oRkc502hCgOPtCHZ/WqmK/w3QCWXM8BzViT/ulK0= Received: from localhost.localdomain (87-206-159-178.dynamic.chello.pl [87.206.159.178]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 4 Feb 2017 16:48:06 +0100 (CET) From: Lukasz Majewski To: Rob Herring , Mark Rutland , "David S. Miller" , Florian Fainelli , jbrunet , Andrew Lunn Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Martin Blumenstingl , Jon Mason , Fabio Estevam , Lukasz Majewski Subject: [PATCH] Documentation: devicetree: Add PHY no lane swap binding Date: Sat, 4 Feb 2017 16:47:47 +0100 Message-Id: <1486223267-11875-1-git-send-email-lukma@denx.de> X-Mailer: git-send-email 2.1.4 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add the documentation to avoid PHY lane swapping. This is a boolean entry to notify the phy device drivers that the TX/RX lanes NO need to be swapped. The use case for this binding mostly happens after wrong HW configuration of PHY IC during bootstrap. Signed-off-by: Lukasz Majewski --- Documentation/devicetree/bindings/net/phy.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/net/phy.txt b/Documentation/devicetree/bindings/net/phy.txt index fb5056b..5e25bc9 100644 --- a/Documentation/devicetree/bindings/net/phy.txt +++ b/Documentation/devicetree/bindings/net/phy.txt @@ -39,6 +39,10 @@ Optional Properties: - enet-phy-lane-swap: If set, indicates the PHY will swap the TX/RX lanes to compensate for the board being designed with the lanes swapped. +- enet-phy-lane-no-swap: If set, indicates that PHY will disable swap of the + TX/RX lanes. This binding allows the PHY to work correcly after e.g. wrong + bootstrap configuration caused by issues in PCB layout design. + - eee-broken-100tx: - eee-broken-1000t: - eee-broken-10gt: