From patchwork Fri Oct 21 14:40:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 685164 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3t0pNL6swzz9t1T for ; Sat, 22 Oct 2016 01:44:18 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b=TQKLZl3B; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935063AbcJUOnz (ORCPT ); Fri, 21 Oct 2016 10:43:55 -0400 Received: from mail-qk0-f178.google.com ([209.85.220.178]:32785 "EHLO mail-qk0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934347AbcJUOkx (ORCPT ); Fri, 21 Oct 2016 10:40:53 -0400 Received: by mail-qk0-f178.google.com with SMTP id n189so156663853qke.0 for ; Fri, 21 Oct 2016 07:40:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EpxOxTeUnbieiFufl/hW9gtwBbCoff9C0P4H8vJgx+I=; b=TQKLZl3B8bkVfG/OkCdNsIBqPzISPtbxLJ00aYNH8mMlzTbOWgUNpxcpGQEk1KhNcT PWLrdstAMSyz6McrbHt3p2551fZSs7at6DiabplYWKanrgF0LaHOGxKzXu0Tng55ZduC HGPAPLLBglpOJUYGcAHvNjfZA/n9qJFxtuasE5eAH/Kh2AzxehOsbFEh8pDxwVBuMC3J o9PYnqUG2SK6GtvkxP5yhgR/s0uBwsmwRpC8A1RmiQBOeCYRtChJCUSX9lG7dqjgMqY5 pF1+Qnwm0GNZNWjuz7j+Uy2aNcR/vfwCdnfiCxh/boj2pC+czoySICiJmiDWZpbpQWZd K5/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EpxOxTeUnbieiFufl/hW9gtwBbCoff9C0P4H8vJgx+I=; b=XesJum9Sxo5sNDcaqhGOz7vmtRI1I4jJhkRKeeb3s8o8extU8lajYjalmVdq7DMApr yY2HGfNhzZlYTiXohqqtAa56uxgV0NJHpb7GrkIjwACKS+psXFeROdlQCDvom0z5I/yA jL4TBjmDmhywc9Hxy+CnRlDtMsXSbX936wMapMxkCloZD8+vhf/WKNZbv1IfFUrf4V8C cR6TJ9LGBtqauGIHxYaSJwK/FQPAzimNCaQTl8aauu8BXmogBD0lyHAyza6yI8jCUAFa NYI4uiEI0VNJzdDOg6lYRjLHftJhpp6AbDmqioY1ZQZk8FbnBAa/MKpDhWpGd7/cFqlj 0NSQ== X-Gm-Message-State: ABUngvfWuRyWLYZgz4Mz1qLq1foUyEwPoWO2larB501GO4v3TEaQ+sBamwLp+f5g/EEEB3vn X-Received: by 10.194.243.104 with SMTP id wx8mr1023126wjc.229.1477060852838; Fri, 21 Oct 2016 07:40:52 -0700 (PDT) Received: from localhost.localdomain (LFbn-1-1885-126.w90-73.abo.wanadoo.fr. [90.73.182.126]) by smtp.gmail.com with ESMTPSA id jt8sm3223281wjc.33.2016.10.21.07.40.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 21 Oct 2016 07:40:52 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com, carlo@caione.org, linus.walleij@linaro.org Cc: Neil Armstrong , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org Subject: [RFC PATCH 04/13] ARM64: dts: meson-gxl: Add clock nodes Date: Fri, 21 Oct 2016 16:40:29 +0200 Message-Id: <1477060838-14164-5-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1477060838-14164-1-git-send-email-narmstrong@baylibre.com> References: <1477060838-14164-1-git-send-email-narmstrong@baylibre.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add clock node for Amlogic Meson GXL. The GXBB compatible is retained since the GXBB clock tree is used for now. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index ce7f550..33d0506 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -42,6 +42,7 @@ */ #include "meson-gx.dtsi" +#include #include / { @@ -214,3 +215,11 @@ }; }; }; + +&hiubus { + clkc: clock-controller@0 { + compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc"; + #clock-cells = <1>; + reg = <0x0 0x0 0x0 0x3db>; + }; +};