From patchwork Fri Oct 21 14:40:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 685165 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3t0pNN2YMdz9t1d for ; Sat, 22 Oct 2016 01:44:20 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b=A5SX239q; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935074AbcJUOn4 (ORCPT ); Fri, 21 Oct 2016 10:43:56 -0400 Received: from mail-qt0-f174.google.com ([209.85.216.174]:35396 "EHLO mail-qt0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934319AbcJUOkx (ORCPT ); Fri, 21 Oct 2016 10:40:53 -0400 Received: by mail-qt0-f174.google.com with SMTP id f6so91588530qtd.2 for ; Fri, 21 Oct 2016 07:40:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ORGy8/xxiIXNSvHdLnbaaBUvgMWl2sbsZq/MTCA7FVA=; b=A5SX239qrjuTq52JbWQfu9lLBJCs76vwJevD+FuNzzH9EpkMtU6kE1JMg8VvaXudyM CBhdaueb9Lr0u6/IMTL+H9gm7mIU6ZQ9n95XuN7QgOREe8/lwa/Qg2C0RAmdWmbLaggi IP9xLEdUfadgR/1D0LCJgu1J2HR+Zh4l30XOkER9tMWfDEndMOeYB7/3uxcjBXB+5ffy KvB/pY4IpVKczTQApmoNdOLTeYA5Ies6hN5Ep9W75DKnbMlEZzr41BytqCMLv86yZULH R6U1ZsK+u89MqSJpeKaqjeGBDZd+PBl0YgnSgfC0Nmy/IFJFfc2tkxRAUjIb3kDO1Fj8 HjZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ORGy8/xxiIXNSvHdLnbaaBUvgMWl2sbsZq/MTCA7FVA=; b=FAOhd/p7XiM71tpDvgu+YWKkw4emi8irpvdvDCIvBfDU6S4w4Gagqae4DlokzrMUbQ IzKJL4h4DtcfMuBjopos+3NSMjN9hCEPQNqVudwvt6YEUJqIQAWbvaQfJZgBtu4F8cHf CKcNFwvw9ERg6gI7tbjgg43R3sxx43LM4NgRAo2Ppmkw4AM5AYRWfq/rOsabj5oyfTI1 JpWTwZ7iZRo0ABeHVQPRCVynrhozMnqrtH4CNEks9MQODQsxEMJQ6+yLy2K9cBC9gOIU x1Azxv+jI1jMWGGwdHypeFZ74kmR6OWxCFt47CO/KtJ2nTT8FumavM+v3LbOIkULnL6v fxgg== X-Gm-Message-State: AA6/9RnO9cpZM9QfpcnYCfws6IXUf1AcbDOT9+LsS360wIOeJeejwPwjwSF5lxf9AuRbOjpu X-Received: by 10.28.150.20 with SMTP id y20mr10284395wmd.67.1477060851845; Fri, 21 Oct 2016 07:40:51 -0700 (PDT) Received: from localhost.localdomain (LFbn-1-1885-126.w90-73.abo.wanadoo.fr. [90.73.182.126]) by smtp.gmail.com with ESMTPSA id jt8sm3223281wjc.33.2016.10.21.07.40.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 21 Oct 2016 07:40:51 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com, carlo@caione.org, linus.walleij@linaro.org Cc: Neil Armstrong , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org Subject: [RFC PATCH 03/13] ARM64: dts: meson-gxl: Add pinctrl nodes Date: Fri, 21 Oct 2016 16:40:28 +0200 Message-Id: <1477060838-14164-4-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1477060838-14164-1-git-send-email-narmstrong@baylibre.com> References: <1477060838-14164-1-git-send-email-narmstrong@baylibre.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add pinctrl nodes and pin definitions for Amlogic Meson GXL. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 168 +++++++++++++++++++++++++++++ 1 file changed, 168 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 13b10ee..ce7f550 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -42,7 +42,175 @@ */ #include "meson-gx.dtsi" +#include / { compatible = "amlogic,meson-gxl"; }; + +&aobus { + pinctrl_aobus: pinctrl@14 { + compatible = "amlogic,meson-gxl-aobus-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio_ao: bank@14 { + reg = <0x0 0x00014 0x0 0x8>, + <0x0 0x0002c 0x0 0x4>, + <0x0 0x00024 0x0 0x8>; + reg-names = "mux", "pull", "gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + uart_ao_a_pins: uart_ao_a { + mux { + groups = "uart_tx_ao_a", "uart_rx_ao_a"; + function = "uart_ao"; + }; + }; + + remote_input_ao_pins: remote_input_ao { + mux { + groups = "remote_input_ao"; + function = "remote_input_ao"; + }; + }; + }; +}; + +&periphs { + pinctrl_periphs: pinctrl@4b0 { + compatible = "amlogic,meson-gxl-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio: bank@4b0 { + reg = <0x0 0x004b0 0x0 0x28>, + <0x0 0x004e8 0x0 0x14>, + <0x0 0x00120 0x0 0x14>, + <0x0 0x00430 0x0 0x40>; + reg-names = "mux", "pull", "pull-enable", "gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + emmc_pins: emmc { + mux { + groups = "emmc_nand_d07", + "emmc_cmd", + "emmc_clk", + "emmc_ds"; + function = "emmc"; + }; + }; + + sdcard_pins: sdcard { + mux { + groups = "sdcard_d0", + "sdcard_d1", + "sdcard_d2", + "sdcard_d3", + "sdcard_cmd", + "sdcard_clk"; + function = "sdcard"; + }; + }; + + sdio_pins: sdio { + mux { + groups = "sdio_d0", + "sdio_d1", + "sdio_d2", + "sdio_d3", + "sdio_cmd", + "sdio_clk"; + function = "sdio"; + }; + }; + + sdio_irq_pins: sdio_irq { + mux { + groups = "sdio_irq"; + function = "sdio"; + }; + }; + + uart_a_pins: uart_a { + mux { + groups = "uart_tx_a", + "uart_rx_a"; + function = "uart_a"; + }; + }; + + uart_b_pins: uart_b { + mux { + groups = "uart_tx_b", + "uart_rx_b"; + function = "uart_b"; + }; + }; + + uart_c_pins: uart_c { + mux { + groups = "uart_tx_c", + "uart_rx_c"; + function = "uart_c"; + }; + }; + + i2c_a_pins: i2c_a { + mux { + groups = "i2c_sck_a", + "i2c_sda_a"; + function = "i2c_a"; + }; + }; + + i2c_b_pins: i2c_b { + mux { + groups = "i2c_sck_b", + "i2c_sda_b"; + function = "i2c_b"; + }; + }; + + i2c_c_pins: i2c_c { + mux { + groups = "i2c_sck_c", + "i2c_sda_c"; + function = "i2c_c"; + }; + }; + + eth_pins: eth_c { + mux { + groups = "eth_mdio", + "eth_mdc", + "eth_clk_rx_clk", + "eth_rx_dv", + "eth_rxd0", + "eth_rxd1", + "eth_rxd2", + "eth_rxd3", + "eth_rgmii_tx_clk", + "eth_tx_en", + "eth_txd0", + "eth_txd1", + "eth_txd2", + "eth_txd3"; + function = "eth"; + }; + }; + + pwm_e_pins: pwm_e { + mux { + groups = "pwm_e"; + function = "pwm_e"; + }; + }; + }; +};