From patchwork Wed Sep 14 03:50:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 669692 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sYndX4F7kz9t0t for ; Wed, 14 Sep 2016 13:50:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757306AbcINDuy (ORCPT ); Tue, 13 Sep 2016 23:50:54 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:46069 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752626AbcINDuw (ORCPT ); Tue, 13 Sep 2016 23:50:52 -0400 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1397273736; Wed, 14 Sep 2016 11:50:48 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Wed, 14 Sep 2016 11:50:47 +0800 From: To: , CC: , , , , , Sean Wang Subject: [PATCH net-next 4/7] net: ethernet: mediatek: add controlling power domain the ethernet belongs to Date: Wed, 14 Sep 2016 11:50:38 +0800 Message-ID: <1473825041-21072-5-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1473825041-21072-1-git-send-email-sean.wang@mediatek.com> References: <1473825041-21072-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Sean Wang introduce power domain control which the digital circuit of the ethernet belongs to inside the flow of hardware initialization and deinitialization which helps the entire ethernet hardware block could restart cleanly and completely as being back to the initial state when the whole machine reboot. Signed-off-by: Sean Wang --- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c index 917a49c6..fd5d064 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -1417,6 +1418,9 @@ static int __init mtk_hw_init(struct mtk_eth *eth) { int i; + pm_runtime_enable(eth->dev); + pm_runtime_get_sync(eth->dev); + clk_prepare_enable(eth->clks[MTK_CLK_ETHIF]); clk_prepare_enable(eth->clks[MTK_CLK_ESW]); clk_prepare_enable(eth->clks[MTK_CLK_GP1]); @@ -1484,6 +1488,9 @@ static int mtk_hw_deinit(struct mtk_eth *eth) clk_disable_unprepare(eth->clks[MTK_CLK_ESW]); clk_disable_unprepare(eth->clks[MTK_CLK_ETHIF]); + pm_runtime_put_sync(eth->dev); + pm_runtime_disable(eth->dev); + return 0; }