From patchwork Sat May 14 05:55:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akinobu Mita X-Patchwork-Id: 622198 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3r6GFY6NJDz9t70 for ; Sat, 14 May 2016 15:56:49 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=rI5v8G6k; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751895AbcENF4j (ORCPT ); Sat, 14 May 2016 01:56:39 -0400 Received: from mail-pa0-f68.google.com ([209.85.220.68]:34989 "EHLO mail-pa0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751735AbcENF4h (ORCPT ); Sat, 14 May 2016 01:56:37 -0400 Received: by mail-pa0-f68.google.com with SMTP id zy2so11786826pac.2 for ; Fri, 13 May 2016 22:56:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Rms6B+1r1rjKKmvhNKgcYbJrIp5hxebWIwjoHT+JZB4=; b=rI5v8G6k/83ZeGqSU9cYk653/7S3BNGDNYur2XgbIW/PYYTdVrglcNDb98ZQvOtVJE FKzSEEc9vvXrPXbrFtZ7mgyDkpE6jY4GvQvC+UzZB2Xa8FOZt1IvpJ1NAxK9TyTE3UP+ k7tFC8na2Rhp3cQhvjDGqwfEsA/sX/YNCC4VyhCy+M0fNDCGpX0QgfgAMnd6pHCYnt1n pfLCtjWRW3PXk8ZzUGS9Ipvp6gbFP+6237MZoASBoul8rWV0AeEfPy8X4LMyj7C2Hlhv 1usQbf3+YgDsn+vl/1n3DjJ+wMTqeoCoOJ1Xy0fKpVuIIrPN3asQja1pSm9JG40n2Gp/ yy9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Rms6B+1r1rjKKmvhNKgcYbJrIp5hxebWIwjoHT+JZB4=; b=egEfzWqnacTWWZbfigGYOQXmz/+DZPDKn8E1CNGyH/EUaCM8dXV26HlvOXQf2UX+BZ s4L9gw7XuNc6CyGPGDL03m5g5JkvkRvNt1cKMcCynVWnRV1jhwIOsj9s3a69i+iYapVq NjDSAx8h30Px4351TpYpr8K5dEpiunQ9SJJnjd5IY33Zv000cPuPO9zx87AkYd6KJilz l14n72pGzmxn+vh8Zgs+0gQi0qM5K3MjOY9LCURM10XKOdoP4lTk52kMsMZc5iJ7anbm xznqdpLSAs9V8q0Cd0Mn1PUBL9muj8P16L6IvN6PkQeeUn3a9SsZHAKLR7OfzhkNInM8 /y1w== X-Gm-Message-State: AOPr4FX3rQSAFwIM1QyB7TlwYRcjqNtyUMI4SBzSAaYzv3d1h7wZvFht2BJE63BTUp/Stg== X-Received: by 10.67.6.3 with SMTP id cq3mr28976530pad.115.1463205396086; Fri, 13 May 2016 22:56:36 -0700 (PDT) Received: from localhost.localdomain ([240f:4:c2bc:1:e521:2a1e:1cf3:ec2]) by smtp.gmail.com with ESMTPSA id a14sm31452372pfc.57.2016.05.13.22.56.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 May 2016 22:56:35 -0700 (PDT) From: Akinobu Mita To: netdev@vger.kernel.org Cc: Akinobu Mita , Mike Sinkovsky , "David S . Miller" Subject: [PATCH -next v2 2/4] net: w5100: fix MAC filtering for W5500 Date: Sat, 14 May 2016 14:55:48 +0900 Message-Id: <1463205350-7089-3-git-send-email-akinobu.mita@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1463205350-7089-1-git-send-email-akinobu.mita@gmail.com> References: <1463205350-7089-1-git-send-email-akinobu.mita@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org W5500 has different bit position for MAC filter in Socket n mode register from W5100 and W5200. Signed-off-by: Akinobu Mita Cc: Mike Sinkovsky Cc: David S. Miller --- * No changes from v1 drivers/net/ethernet/wiznet/w5100.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c index 56ceed9..c80438c 100644 --- a/drivers/net/ethernet/wiznet/w5100.c +++ b/drivers/net/ethernet/wiznet/w5100.c @@ -63,8 +63,9 @@ MODULE_LICENSE("GPL"); #define S0_REGS(priv) ((priv)->s0_regs) #define W5100_S0_MR(priv) (S0_REGS(priv) + W5100_Sn_MR) -#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscuous) */ -#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */ +#define S0_MR_MACRAW 0x04 /* MAC RAW mode */ +#define S0_MR_MF 0x40 /* MAC Filter for W5100 and W5200 */ +#define W5500_S0_MR_MF 0x80 /* MAC Filter for W5500 */ #define W5100_S0_CR(priv) (S0_REGS(priv) + W5100_Sn_CR) #define S0_CR_OPEN 0x01 /* OPEN command */ #define S0_CR_CLOSE 0x10 /* CLOSE command */ @@ -702,8 +703,16 @@ static int w5100_hw_reset(struct w5100_priv *priv) static void w5100_hw_start(struct w5100_priv *priv) { - w5100_write(priv, W5100_S0_MR(priv), priv->promisc ? - S0_MR_MACRAW : S0_MR_MACRAW_MF); + u8 mode = S0_MR_MACRAW; + + if (!priv->promisc) { + if (priv->ops->chip_id == W5500) + mode |= W5500_S0_MR_MF; + else + mode |= S0_MR_MF; + } + + w5100_write(priv, W5100_S0_MR(priv), mode); w5100_command(priv, S0_CR_OPEN); w5100_enable_intr(priv); }