From patchwork Fri May 13 11:59:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 621966 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3r5pS33yqdz9t6g for ; Fri, 13 May 2016 22:04:19 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932204AbcEMMDm (ORCPT ); Fri, 13 May 2016 08:03:42 -0400 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:16352 "EHLO mx0a-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752179AbcEMMDj (ORCPT ); Fri, 13 May 2016 08:03:39 -0400 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id u4DC28Xc005412; Fri, 13 May 2016 05:03:15 -0700 Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0a-0016f401.pphosted.com with ESMTP id 22ve9hpr07-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 13 May 2016 05:03:15 -0700 Received: from SC-EXCH04.marvell.com (10.93.176.84) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1104.5; Fri, 13 May 2016 05:03:14 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server id 15.0.1104.5 via Frontend Transport; Fri, 13 May 2016 05:03:14 -0700 Received: from xhacker.marvell.com (unknown [10.37.131.11]) by maili.marvell.com (Postfix) with ESMTP id 6EBA53F7040; Fri, 13 May 2016 05:03:13 -0700 (PDT) From: Jisheng Zhang To: , CC: , , , Jisheng Zhang Subject: [PATCH 1/2] net: mv643xx_eth: use {readl|writel}_relaxed instead of readl/writel Date: Fri, 13 May 2016 19:59:19 +0800 Message-ID: <1463140760-7128-2-git-send-email-jszhang@marvell.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1463140760-7128-1-git-send-email-jszhang@marvell.com> References: <1463140760-7128-1-git-send-email-jszhang@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-05-13_05:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1605130164 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Since appropriate memory barriers are already there, use the relaxed version to improve performance a bit. Signed-off-by: Jisheng Zhang --- drivers/net/ethernet/marvell/mv643xx_eth.c | 33 +++++++++++++++--------------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c index 5583118..c6d8124 100644 --- a/drivers/net/ethernet/marvell/mv643xx_eth.c +++ b/drivers/net/ethernet/marvell/mv643xx_eth.c @@ -433,22 +433,22 @@ struct mv643xx_eth_private { /* port register accessors **************************************************/ static inline u32 rdl(struct mv643xx_eth_private *mp, int offset) { - return readl(mp->shared->base + offset); + return readl_relaxed(mp->shared->base + offset); } static inline u32 rdlp(struct mv643xx_eth_private *mp, int offset) { - return readl(mp->base + offset); + return readl_relaxed(mp->base + offset); } static inline void wrl(struct mv643xx_eth_private *mp, int offset, u32 data) { - writel(data, mp->shared->base + offset); + writel_relaxed(data, mp->shared->base + offset); } static inline void wrlp(struct mv643xx_eth_private *mp, int offset, u32 data) { - writel(data, mp->base + offset); + writel_relaxed(data, mp->base + offset); } @@ -2642,10 +2642,10 @@ mv643xx_eth_conf_mbus_windows(struct mv643xx_eth_shared_private *msp, int i; for (i = 0; i < 6; i++) { - writel(0, base + WINDOW_BASE(i)); - writel(0, base + WINDOW_SIZE(i)); + writel_relaxed(0, base + WINDOW_BASE(i)); + writel_relaxed(0, base + WINDOW_SIZE(i)); if (i < 4) - writel(0, base + WINDOW_REMAP_HIGH(i)); + writel_relaxed(0, base + WINDOW_REMAP_HIGH(i)); } win_enable = 0x3f; @@ -2654,16 +2654,17 @@ mv643xx_eth_conf_mbus_windows(struct mv643xx_eth_shared_private *msp, for (i = 0; i < dram->num_cs; i++) { const struct mbus_dram_window *cs = dram->cs + i; - writel((cs->base & 0xffff0000) | + writel_relaxed((cs->base & 0xffff0000) | (cs->mbus_attr << 8) | dram->mbus_dram_target_id, base + WINDOW_BASE(i)); - writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i)); + writel_relaxed((cs->size - 1) & 0xffff0000, + base + WINDOW_SIZE(i)); win_enable &= ~(1 << i); win_protect |= 3 << (2 * i); } - writel(win_enable, base + WINDOW_BAR_ENABLE); + writel_relaxed(win_enable, base + WINDOW_BAR_ENABLE); msp->win_protect = win_protect; } @@ -2674,8 +2675,8 @@ static void infer_hw_params(struct mv643xx_eth_shared_private *msp) * [21:8], or a 16-bit coal limit in bits [25,21:7] of the * SDMA config register. */ - writel(0x02000000, msp->base + 0x0400 + SDMA_CONFIG); - if (readl(msp->base + 0x0400 + SDMA_CONFIG) & 0x02000000) + writel_relaxed(0x02000000, msp->base + 0x0400 + SDMA_CONFIG); + if (readl_relaxed(msp->base + 0x0400 + SDMA_CONFIG) & 0x02000000) msp->extended_rx_coal_limit = 1; else msp->extended_rx_coal_limit = 0; @@ -2685,12 +2686,12 @@ static void infer_hw_params(struct mv643xx_eth_shared_private *msp) * yes, whether its associated registers are in the old or * the new place. */ - writel(1, msp->base + 0x0400 + TX_BW_MTU_MOVED); - if (readl(msp->base + 0x0400 + TX_BW_MTU_MOVED) & 1) { + writel_relaxed(1, msp->base + 0x0400 + TX_BW_MTU_MOVED); + if (readl_relaxed(msp->base + 0x0400 + TX_BW_MTU_MOVED) & 1) { msp->tx_bw_control = TX_BW_CONTROL_NEW_LAYOUT; } else { - writel(7, msp->base + 0x0400 + TX_BW_RATE); - if (readl(msp->base + 0x0400 + TX_BW_RATE) & 7) + writel_relaxed(7, msp->base + 0x0400 + TX_BW_RATE); + if (readl_relaxed(msp->base + 0x0400 + TX_BW_RATE) & 7) msp->tx_bw_control = TX_BW_CONTROL_OLD_LAYOUT; else msp->tx_bw_control = TX_BW_CONTROL_ABSENT;