From patchwork Thu Apr 28 20:06:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Heimpold X-Patchwork-Id: 616399 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qwnsf3bwMz9t92 for ; Fri, 29 Apr 2016 06:06:46 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=heimpold.de header.i=@heimpold.de header.b=FhEVomKl; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753360AbcD1UGl (ORCPT ); Thu, 28 Apr 2016 16:06:41 -0400 Received: from mo4-p00-ob.smtp.rzone.de ([81.169.146.217]:54353 "EHLO mo4-p00-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753166AbcD1UGi (ORCPT ); Thu, 28 Apr 2016 16:06:38 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1461873995; l=4887; s=domk; d=heimpold.de; h=References:In-Reply-To:Date:Subject:Cc:To:From; bh=Yiro+wBSFufLKfqsN0xfmUhOeHp7cmFbUKUuGbzhJ/I=; b=FhEVomKl+to+FSo6XkepY/SzY/+aC7r+Q7b9GfRpVwSfdKDHHCvER3QalE5Zq/9p4uS 7Y1QRWZkogxt4bnSTFZpl+AFE0Z1FcbVeW5eZ9G/E+gy+17S5z4R0M27uoyRHZOmb5JFU UwT2+w7pKvjAtJ/BKsBAIzyVuTIxUnEfgOU= X-RZG-AUTH: :O2kGeEG7b/pS1EW8QnKjhhg/vO4pzqdNys2z+NfqLSUoNNCTudAAFEJqC9pBN4NFybbBTTU= X-RZG-CLASS-ID: mo00 Received: from tonne.mhei.heimpold.itr (p4FD0DC78.dip0.t-ipconnect.de [79.208.220.120]) by post.strato.de (RZmta 37.24 DYNA|AUTH) with ESMTPA id R060ebs3SK6XsWy; Thu, 28 Apr 2016 22:06:33 +0200 (CEST) Received: from kerker.fritz.box (kerker.mhei.heimpold.itr [192.168.8.1]) by tonne.mhei.heimpold.itr (Postfix) with ESMTP id E84B12581F; Thu, 28 Apr 2016 22:06:32 +0200 (CEST) From: Michael Heimpold To: Jonathan Cameron , "Andrew F . Davis" , Mark Brown , netdev@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Cc: Michael Heimpold Subject: [PATCH v3 net-next 2/2] net: ethernet: enc28j60: add device tree support Date: Thu, 28 Apr 2016 22:06:15 +0200 Message-Id: <1461873975-6368-3-git-send-email-mhei@heimpold.de> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1461873975-6368-1-git-send-email-mhei@heimpold.de> References: <1461873975-6368-1-git-send-email-mhei@heimpold.de> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The following patch adds the required match table for device tree support (and while at, fix the indent). It's also possible to specify the MAC address in the DT blob. Also add the corresponding binding documentation file. Signed-off-by: Michael Heimpold Acked-by: Rob Herring --- Changelog: v3: * renamed and improved binding documentation as suggested by Rob Herring v2: * took care of Arnd Bergmann's review comments - allow to specify MAC address via DT - unconditionally define DT id table * increased the driver version minor number * driver author's email address bounces, removed from address list v1: * Initial submission .../devicetree/bindings/net/microchip,enc28j60.txt | 59 ++++++++++++++++++++++ drivers/net/ethernet/microchip/enc28j60.c | 20 ++++++-- 2 files changed, 76 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/microchip,enc28j60.txt diff --git a/Documentation/devicetree/bindings/net/microchip,enc28j60.txt b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt new file mode 100644 index 0000000..1dc3bc7 --- /dev/null +++ b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt @@ -0,0 +1,59 @@ +* Microchip ENC28J60 + +This is a standalone 10 MBit ethernet controller with SPI interface. + +For each device connected to a SPI bus, define a child node within +the SPI master node. + +Required properties: +- compatible: Should be "microchip,enc28j60" +- reg: Specify the SPI chip select the ENC28J60 is wired to +- interrupt-parent: Specify the phandle of the source interrupt, see interrupt + binding documentation for details. Usually this is the GPIO bank + the interrupt line is wired to. +- interrupts: Specify the interrupt index within the interrupt controller (referred + to above in interrupt-parent) and interrupt type. The ENC28J60 natively + generates falling edge interrupts, however, additional board logic + might invert the signal. +- pinctrl-names: List of assigned state names, see pinctrl binding documentation. +- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line, + see also generic and your platform specific pinctrl binding + documentation. + +Optional properties: +- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60. + According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however, + board designs may need to limit this value. +- local-mac-address: See ethernet.txt in the same directory. + + +Example (for NXP i.MX28 with pin control stuff for GPIO irq): + + ssp2: ssp@80014000 { + compatible = "fsl,imx28-spi"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>; + status = "okay"; + + enc28j60: ethernet@0 { + compatible = "microchip,enc28j60"; + pinctrl-names = "default"; + pinctrl-0 = <&enc28j60_pins>; + reg = <0>; + interrupt-parent = <&gpio3>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <12000000>; + }; + }; + + pinctrl@80018000 { + enc28j60_pins: enc28j60_pins@0 { + reg = <0>; + fsl,pinmux-ids = < + MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */ + >; + fsl,drive-strength = ; + fsl,voltage = ; + fsl,pull-up = ; + }; + }; diff --git a/drivers/net/ethernet/microchip/enc28j60.c b/drivers/net/ethernet/microchip/enc28j60.c index b723622..7066954 100644 --- a/drivers/net/ethernet/microchip/enc28j60.c +++ b/drivers/net/ethernet/microchip/enc28j60.c @@ -28,11 +28,12 @@ #include #include #include +#include #include "enc28j60_hw.h" #define DRV_NAME "enc28j60" -#define DRV_VERSION "1.01" +#define DRV_VERSION "1.02" #define SPI_OPLEN 1 @@ -1548,6 +1549,7 @@ static int enc28j60_probe(struct spi_device *spi) { struct net_device *dev; struct enc28j60_net *priv; + const void *macaddr; int ret = 0; if (netif_msg_drv(&debug)) @@ -1579,7 +1581,12 @@ static int enc28j60_probe(struct spi_device *spi) ret = -EIO; goto error_irq; } - eth_hw_addr_random(dev); + + macaddr = of_get_mac_address(spi->dev.of_node); + if (macaddr) + ether_addr_copy(dev->dev_addr, macaddr); + else + eth_hw_addr_random(dev); enc28j60_set_hw_macaddr(dev); /* Board setup must set the relevant edge trigger type; @@ -1634,9 +1641,16 @@ static int enc28j60_remove(struct spi_device *spi) return 0; } +static const struct of_device_id enc28j60_dt_ids[] = { + { .compatible = "microchip,enc28j60" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, enc28j60_dt_ids); + static struct spi_driver enc28j60_driver = { .driver = { - .name = DRV_NAME, + .name = DRV_NAME, + .of_match_table = enc28j60_dt_ids, }, .probe = enc28j60_probe, .remove = enc28j60_remove,