From patchwork Thu Apr 28 07:01:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yisen.Zhuang(Zhuangyuzeng)" X-Patchwork-Id: 616011 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qwS7G2hJjz9t5s for ; Thu, 28 Apr 2016 16:47:22 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752542AbcD1GrT (ORCPT ); Thu, 28 Apr 2016 02:47:19 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:26104 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751983AbcD1GrS (ORCPT ); Thu, 28 Apr 2016 02:47:18 -0400 Received: from 172.24.1.36 (EHLO SZXEML423-HUB.china.huawei.com) ([172.24.1.36]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id CAV17855; Thu, 28 Apr 2016 14:43:21 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by SZXEML423-HUB.china.huawei.com (10.82.67.154) with Microsoft SMTP Server id 14.3.235.1; Thu, 28 Apr 2016 14:43:10 +0800 From: Yisen Zhuang To: , , CC: , , , , , , , , , , , , , , , Subject: [PATCH net-next 09/10] net: hns: add attribute port-rst-offset for dsaf port node Date: Thu, 28 Apr 2016 15:01:41 +0800 Message-ID: <1461826902-51368-10-git-send-email-Yisen.Zhuang@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461826902-51368-1-git-send-email-Yisen.Zhuang@huawei.com> References: <1461826902-51368-1-git-send-email-Yisen.Zhuang@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.5721B109.00C9, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 1e3091c05cd87fc87e4c4b66f746bfd6 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The reset offset for each port in a dsaf is different. The current code is not so readability. This patch adds configuration named port-rst-offset to make the code simple and more readability. If this attribute isn't exists, default value of this attribute is equal to its port index. Signed-off-by: Yisen Zhuang --- .../devicetree/bindings/net/hisilicon-hns-dsaf.txt | 4 +++- drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c | 10 +++++++++ drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h | 1 + drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 26 +++++++--------------- 4 files changed, 22 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt b/Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt index c1358ea..72efe71 100644 --- a/Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt +++ b/Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt @@ -42,7 +42,9 @@ Required properties: - cpld-syscon: is syscon handle for cpld register. It is not required if there isn't cpld device. - cpld-ctrl-reg: is cpld register offset. It is not required if there isn't - cpld-syscon. + cpld-syscon. +- port-rst-offset: is offset of reset field for each port in dsaf. Its value + depends on the hardware user manual. [1] Documentation/devicetree/bindings/net/phy.txt diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c index f1a477d..190477e 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c @@ -664,6 +664,7 @@ static int hns_mac_get_info(struct hns_mac_cb *mac_cb) mac_cb->max_frm = MAC_DEFAULT_MTU; mac_cb->tx_pause_frm_time = MAC_DEFAULT_PAUSE_TIME; + mac_cb->port_rst_off = mac_cb->mac_id; /* if the dsaf node doesn't contain a port subnode, * parse the old dts to get phy-handle from dsaf node @@ -694,6 +695,15 @@ static int hns_mac_get_info(struct hns_mac_cb *mac_cb) } mac_cb->serdes_ctrl = syscon; + ret = fwnode_property_read_u32(mac_cb->fw_port, + "port-rst-offset", + &mac_cb->port_rst_off); + if (ret) { + dev_dbg(mac_cb->dev, + "mac%d port-rst-offset not found, use default value.\n", + mac_cb->mac_id); + } + syscon = syscon_node_to_regmap( of_parse_phandle(to_of_node(mac_cb->fw_port), "cpld-syscon", 0)); diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h index 719816b..7be7104 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h @@ -318,6 +318,7 @@ struct hns_mac_cb { struct regmap *serdes_ctrl; struct regmap *cpld_ctrl; u32 cpld_ctrl_reg; + u32 port_rst_off; struct mac_entry_idx addr_entry_idx[DSAF_MAX_VM_NUM]; u8 sfp_prsnt; u8 cpld_led_value; diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c index 7e52ab5..fc3056e 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c @@ -136,11 +136,7 @@ void hns_dsaf_xge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port, u32 val) return; reg_val |= RESET_REQ_OR_DREQ; - - if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) - reg_val |= 0x2082082 << port; - else - reg_val |= 0x2082082 << (dsaf_dev->reset_offset + 6); + reg_val |= 0x2082082 << dsaf_dev->mac_cb[port]->port_rst_off; if (val == 0) reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG; @@ -159,11 +155,7 @@ void hns_dsaf_xge_core_srst_by_port(struct dsaf_device *dsaf_dev, if (port >= DSAF_XGE_NUM) return; - if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) - reg_val |= XGMAC_TRX_CORE_SRST_M << port; - else - reg_val |= XGMAC_TRX_CORE_SRST_M << - (dsaf_dev->reset_offset + 6); + reg_val |= XGMAC_TRX_CORE_SRST_M << dsaf_dev->mac_cb[port]->port_rst_off; if (val == 0) reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG; @@ -177,17 +169,19 @@ void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port, u32 val) { u32 reg_val_1; u32 reg_val_2; + u32 port_rst_off; if (port >= DSAF_GE_NUM) return; if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) { reg_val_1 = 0x1 << port; + port_rst_off = dsaf_dev->mac_cb[port]->port_rst_off; /* there is difference between V1 and V2 in register.*/ if (AE_IS_VER1(dsaf_dev->dsaf_ver)) - reg_val_2 = 0x1041041 << port; + reg_val_2 = 0x1041041 << port_rst_off; else - reg_val_2 = 0x2082082 << port; + reg_val_2 = 0x2082082 << port_rst_off; if (val == 0) { dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG, @@ -226,12 +220,8 @@ void hns_ppe_srst_by_port(struct dsaf_device *dsaf_dev, u32 port, u32 val) { u32 reg_val = 0; u32 reg_addr; - - if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) - reg_val |= RESET_REQ_OR_DREQ << port; - else - reg_val |= RESET_REQ_OR_DREQ << - (dsaf_dev->reset_offset + 6); + + reg_val |= RESET_REQ_OR_DREQ << dsaf_dev->mac_cb[port]->port_rst_off; if (val == 0) reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG;