From patchwork Mon Apr 4 16:22:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 605915 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qdyB66WY1z9sC4 for ; Tue, 5 Apr 2016 02:29:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756189AbcDDQ3d (ORCPT ); Mon, 4 Apr 2016 12:29:33 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:49556 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756177AbcDDQ3b (ORCPT ); Mon, 4 Apr 2016 12:29:31 -0400 Received: by wens.csie.org (Postfix, from userid 1000) id DCEE25F983; Tue, 5 Apr 2016 00:22:47 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard , Florian Fainelli , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Cc: Chen-Yu Tsai , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, LABBE Corentin Subject: [PATCH RFC 3/5] ARM: dts: sun8i-h3: Add H3 Ethernet PHY device node to sun8i-h3.dtsi Date: Tue, 5 Apr 2016 00:22:32 +0800 Message-Id: <1459786954-12649-4-git-send-email-wens@csie.org> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1459786954-12649-1-git-send-email-wens@csie.org> References: <1459786954-12649-1-git-send-email-wens@csie.org> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Allwinner H3 SoC incorporates an Ethernet PHY, whose controls are mapped to a system control register. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-h3.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 4a4926b0b0ed..9a28aeba9bc6 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -323,6 +323,15 @@ #size-cells = <1>; ranges; + ephy: ethernet-phy@01c00030 { + compatible = "allwinner,sun8i-h3-ephy"; + reg = <0x01c00030 0x4>; + clocks = <&bus_gates 128>; + resets = <&ahb_rst 66>; + #clock-cells = <0>; + clock-output-names = "emac_tx"; + }; + dma: dma-controller@01c02000 { compatible = "allwinner,sun8i-h3-dma"; reg = <0x01c02000 0x1000>;