From patchwork Mon Nov 30 16:21:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Burton X-Patchwork-Id: 550223 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 77B0C14018C for ; Tue, 1 Dec 2015 03:28:13 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754944AbbK3Q1z (ORCPT ); Mon, 30 Nov 2015 11:27:55 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:19965 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752572AbbK3Q1x (ORCPT ); Mon, 30 Nov 2015 11:27:53 -0500 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Websense Email Security Gateway with ESMTPS id 40F7A77AC2968; Mon, 30 Nov 2015 16:27:49 +0000 (GMT) Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by HHMAIL01.hh.imgtec.org (10.100.10.19) with Microsoft SMTP Server (TLS) id 14.3.235.1; Mon, 30 Nov 2015 16:27:51 +0000 Received: from localhost (10.100.200.236) by LEMAIL01.le.imgtec.org (192.168.152.62) with Microsoft SMTP Server (TLS) id 14.3.210.2; Mon, 30 Nov 2015 16:27:51 +0000 From: Paul Burton To: CC: Paul Burton , , Subject: [PATCH 23/28] net: pch_gbe: always reset PHY along with MAC Date: Mon, 30 Nov 2015 16:21:48 +0000 Message-ID: <1448900513-20856-24-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1448900513-20856-1-git-send-email-paul.burton@imgtec.com> References: <1448900513-20856-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.100.200.236] Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On the MIPS Boston development board, the EG20T MAC does not report receiving the RX clock from the (RGMII) RTL8211E PHY unless the PHY is reset at the same time as the MAC. Since the pch_gbe driver resets the MAC a number of times - twice during probe, and when taking down the network interface - we need to reset the PHY at all the same times. Do that from pch_gbe_mac_reset_hw which is used to reset the MAC in all cases. Signed-off-by: Paul Burton --- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index 23d28f0..824ff9e 100644 --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c @@ -378,10 +378,13 @@ static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw) { /* Read the MAC address. and store to the private data */ pch_gbe_mac_read_mac_addr(hw); + pch_gbe_phy_set_reset(hw, 1); iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET); #ifdef PCH_GBE_MAC_IFOP_RGMII iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE); #endif + pch_gbe_phy_set_reset(hw, 0); + usleep_range(1250, 1500); pch_gbe_wait_clr_bit(&hw->reg->RESET, PCH_GBE_ALL_RST); /* Setup the receive addresses */ pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);