From patchwork Mon Nov 30 16:21:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Burton X-Patchwork-Id: 550222 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id B911C140281 for ; Tue, 1 Dec 2015 03:27:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754434AbbK3Q10 (ORCPT ); Mon, 30 Nov 2015 11:27:26 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:65404 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754302AbbK3Q1Y (ORCPT ); Mon, 30 Nov 2015 11:27:24 -0500 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Websense Email Security Gateway with ESMTPS id 036E8209ACC5B; Mon, 30 Nov 2015 16:27:20 +0000 (GMT) Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by HHMAIL01.hh.imgtec.org (10.100.10.19) with Microsoft SMTP Server (TLS) id 14.3.235.1; Mon, 30 Nov 2015 16:27:22 +0000 Received: from localhost (10.100.200.236) by LEMAIL01.le.imgtec.org (192.168.152.62) with Microsoft SMTP Server (TLS) id 14.3.210.2; Mon, 30 Nov 2015 16:27:21 +0000 From: Paul Burton To: CC: Paul Burton , , Subject: [PATCH 21/28] net: pch_gbe: mark Minnow PHY reset GPIO active low Date: Mon, 30 Nov 2015 16:21:46 +0000 Message-ID: <1448900513-20856-22-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1448900513-20856-1-git-send-email-paul.burton@imgtec.com> References: <1448900513-20856-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.100.200.236] Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Minnow PHY reset GPIO is set to 0 to enter reset & 1 to leave reset - that is, it is an active low GPIO. In order to allow for the code to be made more generic by further patches, indicate to the GPIO subsystem that the GPIO is active low & invert the values it is set to such that they reflect logically whether the device is being reset or not. Signed-off-by: Paul Burton --- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index 3b98b263b..fde4c11 100644 --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c @@ -2717,7 +2717,8 @@ err_free_netdev: */ static int pch_gbe_minnow_platform_init(struct pci_dev *pdev) { - unsigned long flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH | GPIOF_EXPORT; + unsigned long flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW | + GPIOF_EXPORT | GPIOF_ACTIVE_LOW; unsigned gpio = MINNOW_PHY_RESET_GPIO; int ret; @@ -2729,10 +2730,10 @@ static int pch_gbe_minnow_platform_init(struct pci_dev *pdev) return ret; } - gpio_set_value(gpio, 0); - usleep_range(1250, 1500); gpio_set_value(gpio, 1); usleep_range(1250, 1500); + gpio_set_value(gpio, 0); + usleep_range(1250, 1500); return ret; }