From patchwork Fri Nov 27 15:44:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Wojtas X-Patchwork-Id: 549506 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id F038B140319 for ; Sat, 28 Nov 2015 02:45:20 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=semihalf-com.20150623.gappssmtp.com header.i=@semihalf-com.20150623.gappssmtp.com header.b=wTSCKTsx; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754990AbbK0Pom (ORCPT ); Fri, 27 Nov 2015 10:44:42 -0500 Received: from mail-lf0-f47.google.com ([209.85.215.47]:33832 "EHLO mail-lf0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754965AbbK0Poi (ORCPT ); Fri, 27 Nov 2015 10:44:38 -0500 Received: by lffu14 with SMTP id u14so133790307lff.1 for ; Fri, 27 Nov 2015 07:44:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vw6MdU/KrIB1EpAqv4fMg/7qeavg1yt+BasdtGU6gmI=; b=wTSCKTsxOINwUwMfrG799d7gQLRHqrTcoEfQ3QAvrHjTZd+vmJ6KzWIKloQx+o0hyg 9/2oXWMmsZ6eNs/WkNjYTW9H0vfBbwu24y0z5T0JD04QhAKj4MNRUA2Lvn04SnW/2npK xshKXZ5SmTeQccA889rTEUY+ay6kVeHR61YH28A5s6R6CMt5jKPOhj0MdAshlzbSrP7b IypCa/nZUmeH12fI7scBCGBGd+KCWP4an2zEkas4v7BsSOwzdwQFhkgyzA1gGiEFKZ1n nX83qy8YeeSrLiiLvDQvIoqcEK6HEYYHqxFjOx48M3yXYuw0/eENvMYUMHbFscxuOWRo 9X8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vw6MdU/KrIB1EpAqv4fMg/7qeavg1yt+BasdtGU6gmI=; b=M1Yulq0XK3gVv/bw7efOrYbm8IWAxu9sEU0t0dCmp7PAd7Fb+8P5abJlQ+JAbIQwwy O6Q0BPtNGLtwEwD9aIUsATIDGrqM1JSpyCGNLp8VWIxcfZTE4QbCu3TXB+yRC7ozhnUi 3Ul4xFoN/YdFcRMTOGW21KRqzGz5iN7E6i9NYJMJD61d7FNzxlUDYsnED0LUN1p+Lo9V y7bGzSkc71hJ5+mmKsFpapuzKSP3mjA8KdrFhJR/kV3CuTt2RNCTlyoxm6eo8W/iSaDo gltoZgdYQFrRq7gnLSeIw/aj0GIvz45EB6ByFngOdW6zRghX2J5ex6n1r3P3CjsMviHo Q8qQ== X-Gm-Message-State: ALoCoQkU1V7TEV9cdPc7hYrTCL09bnTpoBGdXXGD9SrcbhWXkkDYistNL7zRdozpw+OJ2Dmd7GJ7 X-Received: by 10.112.200.229 with SMTP id jv5mr20939179lbc.23.1448639075573; Fri, 27 Nov 2015 07:44:35 -0800 (PST) Received: from enkidu.semihalf.local ([80.82.22.190]) by smtp.gmail.com with ESMTPSA id k189sm5096651lfd.12.2015.11.27.07.44.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Nov 2015 07:44:34 -0800 (PST) From: Marcin Wojtas To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org Cc: davem@davemloft.net, linux@arm.linux.org.uk, sebastian.hesselbarth@gmail.com, andrew@lunn.ch, jason@lakedaemon.net, thomas.petazzoni@free-electrons.com, gregory.clement@free-electrons.com, simon.guinot@sequanux.org, nadavh@marvell.com, alior@marvell.com, xswang@marvell.com, myair@marvell.com, nitroshift@yahoo.com, mw@semihalf.com, jaz@semihalf.com, tn@semihalf.com Subject: [PATCH v3 net 2/6] net: mvneta: fix bit assignment in MVNETA_RXQ_CONFIG_REG Date: Fri, 27 Nov 2015 16:44:22 +0100 Message-Id: <1448639066-13074-3-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1448639066-13074-1-git-send-email-mw@semihalf.com> References: <1448639066-13074-1-git-send-email-mw@semihalf.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org MVNETA_RXQ_HW_BUF_ALLOC bit which controls enabling hardware buffer allocation was mistakenly set as BIT(1). This commit fixes the assignment. Signed-off-by: Marcin Wojtas Reviewed-by: Gregory CLEMENT Fixes: c5aff18204da ("net: mvneta: driver for Marvell Armada 370/XP network unit") --- drivers/net/ethernet/marvell/mvneta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index 2d80256..64c46f0 100644 --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c @@ -36,7 +36,7 @@ /* Registers */ #define MVNETA_RXQ_CONFIG_REG(q) (0x1400 + ((q) << 2)) -#define MVNETA_RXQ_HW_BUF_ALLOC BIT(1) +#define MVNETA_RXQ_HW_BUF_ALLOC BIT(0) #define MVNETA_RXQ_PKT_OFFSET_ALL_MASK (0xf << 8) #define MVNETA_RXQ_PKT_OFFSET_MASK(offs) ((offs) << 8) #define MVNETA_RXQ_THRESHOLD_REG(q) (0x14c0 + ((q) << 2))