From patchwork Sun Nov 22 07:53:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Wojtas X-Patchwork-Id: 547291 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id F42241402BE for ; Sun, 22 Nov 2015 18:59:34 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=semihalf-com.20150623.gappssmtp.com header.i=@semihalf-com.20150623.gappssmtp.com header.b=QU6/OdGa; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751899AbbKVHyr (ORCPT ); Sun, 22 Nov 2015 02:54:47 -0500 Received: from mail-lf0-f50.google.com ([209.85.215.50]:35889 "EHLO mail-lf0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751453AbbKVHxw (ORCPT ); Sun, 22 Nov 2015 02:53:52 -0500 Received: by lfs39 with SMTP id 39so91331405lfs.3 for ; Sat, 21 Nov 2015 23:53:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YYmHedRPNMCBIwYyxWj4ytGsMuleJPZ90en5BhZ1C2c=; b=QU6/OdGajUxbyS1FFqKBkzPr/eyF3YegbQvd8qIprj4M1R9PBq7PBt3LZzNrTbc5yx nvkJ2OHI5c5HVEwjKo07sh0FgManf6SPEuIBkQJHqMu3AWpIdD4pD7IZbJnPnSZE5Dic 2nOw0emlKEt6E/WJ9UTqukg2acPp31nQ2JPCD3gdZRYZUezwaWinBcq7LUuA7AhID+P6 ul7G3HLFouJuSF68/U1DdtNY9i3YhQ0kfkck0mlHOjocutz6rvKbHs8Y5t12bley4gUT CaazeQRKTBroR1bQuUh63HUJR/itDjKAPB1ACg5Whz7GHZQ1rYdDyvhNectsO5S03l8h 3JVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YYmHedRPNMCBIwYyxWj4ytGsMuleJPZ90en5BhZ1C2c=; b=CqRO1G74i9ecdasWbdIPcKKfETWevA7Vlwdz8wPFq8m6d5i6ekeIVVTQNgEKgwFLkS mGRlBusX9v4HOgThDzOfmUeZkCD9sPHydOtAlCxK+oLV/hygeOxFktEUI4a1ahFbqgyX mZMlos5BUDTo0vsxXgIVlQ9ZmOtGynqoZjZsiP0YI4zbdGKzJ85dqz8v1eV2KFyL96nL b0ijhmBBPITYde7/ML0Yi+JHEolwHoHsUF4U9ujlc3WbhBdpf+fW97MxdyzdwyFPo6np 0jy6y5myf3SG+QLWGR8h9HjxJ8GKXB07u9Ry2U95JajAjHy5AfUzWbsyah+EF33bMnHu nefw== X-Gm-Message-State: ALoCoQl2zIXSFamFcy//0i+b2xmyFWt/s+zmMIjiZqu7HyX6+q4PYwuCn5xDZA48W9G/ZPMaNTmI X-Received: by 10.25.157.85 with SMTP id g82mr7366709lfe.104.1448178831457; Sat, 21 Nov 2015 23:53:51 -0800 (PST) Received: from enkidu.semihalf.local (cardhu.semihalf.com. [213.17.239.108]) by smtp.gmail.com with ESMTPSA id y79sm1010840lfd.45.2015.11.21.23.53.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 21 Nov 2015 23:53:50 -0800 (PST) From: Marcin Wojtas To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org Cc: davem@davemloft.net, linux@arm.linux.org.uk, sebastian.hesselbarth@gmail.com, andrew@lunn.ch, jason@lakedaemon.net, thomas.petazzoni@free-electrons.com, gregory.clement@free-electrons.com, simon.guinot@sequanux.org, nadavh@marvell.com, alior@marvell.com, xswang@marvell.com, myair@marvell.com, nitroshift@yahoo.com, mw@semihalf.com, jaz@semihalf.com, tn@semihalf.com, Subject: [PATCH 03/13] net: mvneta: fix bit assignment in MVNETA_RXQ_CONFIG_REG Date: Sun, 22 Nov 2015 08:53:49 +0100 Message-Id: <1448178839-3541-4-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1448178839-3541-1-git-send-email-mw@semihalf.com> References: <1448178839-3541-1-git-send-email-mw@semihalf.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org MVNETA_RXQ_HW_BUF_ALLOC bit which controls enabling hardware buffer allocation was mistakenly set as BIT(1). This commit fixes the assignment. Signed-off-by: Marcin Wojtas Cc: # v3.8+ Reviewed-by: Gregory CLEMENT --- drivers/net/ethernet/marvell/mvneta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index 0f30aaa..d12b8c6 100644 --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c @@ -36,7 +36,7 @@ /* Registers */ #define MVNETA_RXQ_CONFIG_REG(q) (0x1400 + ((q) << 2)) -#define MVNETA_RXQ_HW_BUF_ALLOC BIT(1) +#define MVNETA_RXQ_HW_BUF_ALLOC BIT(0) #define MVNETA_RXQ_PKT_OFFSET_ALL_MASK (0xf << 8) #define MVNETA_RXQ_PKT_OFFSET_MASK(offs) ((offs) << 8) #define MVNETA_RXQ_THRESHOLD_REG(q) (0x14c0 + ((q) << 2))