From patchwork Tue Oct 27 00:02:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Shi X-Patchwork-Id: 536406 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 231A8140D92 for ; Tue, 27 Oct 2015 11:20:44 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro_org.20150623.gappssmtp.com header.i=@linaro_org.20150623.gappssmtp.com header.b=qCacJoMK; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752949AbbJ0AUU (ORCPT ); Mon, 26 Oct 2015 20:20:20 -0400 Received: from mail-pa0-f53.google.com ([209.85.220.53]:35458 "EHLO mail-pa0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751399AbbJ0AUQ (ORCPT ); Mon, 26 Oct 2015 20:20:16 -0400 Received: by pasz6 with SMTP id z6so202795629pas.2 for ; Mon, 26 Oct 2015 17:20:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=IFhpPJhfIcF9qWKvc+jLupaRxoK+wmoG4Adbg/EpTCA=; b=qCacJoMKj8qfeZ/Y3wKoTK1gb9zwBnOrzwECd4Vni3qJCrSirWkPviiQMiM2dmA8eu 4ujl2Vh04C7JqE5BMsx5yCuVXf62Xcnv4tqMTwBph/olBy9Rj4c6XaSg6at/D+HeqMMK zt8YRSyXetOCUKWPp2VvM9njP7i6JrwMoittYlHchUAj7E96fnn0fA/ZXLj2v44swPN7 d6d6F3wBYFxvFKcNiWlLbUlGG1PEP7NttcgUafTsPIV3Q7lzlY3TV6RDoTAwiDPqkCY/ D5U2EGmCQAY7qNh8JoquZr+Sp+lqqcbIQT7g6FKSu4/KEI8Q1JaZ7EAWX0m8IQoFDJdd 9wBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=IFhpPJhfIcF9qWKvc+jLupaRxoK+wmoG4Adbg/EpTCA=; b=SnNN47TAfFMgTEQYwHCvGJJJkPdgsBFOj2Ml7T+lT5XMpnDCzGnHn3JisKLT1y2+/m 8d4Fxph/9Q+Yj4gSxSG18merNGQQD+6XX154wHrBPDJFH+5AomXfjLGP02vXkzHnI3qn TStn9vVeTfolYF7P0cJFs/tpBAvdEf1gP5+4TCNuJiz7CYZywJz94rLAjtjEKlys2kiC WnYu+Vd5gAwu9aLeRtbzKBRQ02EshKJh8oOkT5C2xkYo699cKG/1PRr6rlB/j858UUe2 Loh4XCiIrqjLYbjnTRtdSuVKTNo5DiOPWt3ilktPu1TaLIcIo/AKPkYO5AmpMipiazrE bhYQ== X-Gm-Message-State: ALoCoQmomFX7vkCRaEICjFpfZEkxN1gy5EzxNWz2b+cAI+QeVFLKaZNhadStC/D9OjOgJr2jBv4C X-Received: by 10.68.168.164 with SMTP id zx4mr24417469pbb.75.1445905215732; Mon, 26 Oct 2015 17:20:15 -0700 (PDT) Received: from yshi-Precision-T5600.corp.ad.wrs.com (unknown-216-82.windriver.com. [147.11.216.82]) by smtp.gmail.com with ESMTPSA id qy7sm36175962pab.37.2015.10.26.17.20.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Oct 2015 17:20:15 -0700 (PDT) From: Yang Shi To: ast@kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-kernel@lists.linaro.org, yang.shi@linaro.org Subject: [PATCH] bpf: sample: define aarch64 specific registers Date: Mon, 26 Oct 2015 17:02:19 -0700 Message-Id: <1445904139-19212-1-git-send-email-yang.shi@linaro.org> X-Mailer: git-send-email 2.0.2 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Define aarch64 specific registers for building bpf samples correctly. Signed-off-by: Yang Shi Acked-by: Alexei Starovoitov --- samples/bpf/bpf_helpers.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/samples/bpf/bpf_helpers.h b/samples/bpf/bpf_helpers.h index 3a44d3a..af44e56 100644 --- a/samples/bpf/bpf_helpers.h +++ b/samples/bpf/bpf_helpers.h @@ -86,5 +86,17 @@ static int (*bpf_l4_csum_replace)(void *ctx, int off, int from, int to, int flag #define PT_REGS_RC(x) ((x)->gprs[2]) #define PT_REGS_SP(x) ((x)->gprs[15]) +#elif defined(__aarch64__) + +#define PT_REGS_PARM1(x) ((x)->regs[0]) +#define PT_REGS_PARM2(x) ((x)->regs[1]) +#define PT_REGS_PARM3(x) ((x)->regs[2]) +#define PT_REGS_PARM4(x) ((x)->regs[3]) +#define PT_REGS_PARM5(x) ((x)->regs[4]) +#define PT_REGS_RET(x) ((x)->regs[30]) +#define PT_REGS_FP(x) ((x)->regs[29]) /* Works only with CONFIG_FRAME_POINTER */ +#define PT_REGS_RC(x) ((x)->regs[0]) +#define PT_REGS_SP(x) ((x)->sp) + #endif #endif