From patchwork Fri Jul 3 14:25:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 491106 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 735621401B5 for ; Sat, 4 Jul 2015 00:32:28 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755119AbbGCOaA (ORCPT ); Fri, 3 Jul 2015 10:30:00 -0400 Received: from down.free-electrons.com ([37.187.137.238]:37739 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755290AbbGCO36 (ORCPT ); Fri, 3 Jul 2015 10:29:58 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id AB80EA30; Fri, 3 Jul 2015 16:29:57 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (145.200.97.84.rev.sfr.net [84.97.200.145]) by mail.free-electrons.com (Postfix) with ESMTPSA id 3E1D4801; Fri, 3 Jul 2015 16:29:53 +0200 (CEST) From: Maxime Ripard To: Thomas Gleixner , Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , "David S. Miller" Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Maxime Ripard , Subject: [PATCH 1/6] net: mvneta: Fix CPU_MAP registers initialisation Date: Fri, 3 Jul 2015 16:25:46 +0200 Message-Id: <1435933551-28696-2-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.4.5 In-Reply-To: <1435933551-28696-1-git-send-email-maxime.ripard@free-electrons.com> References: <1435933551-28696-1-git-send-email-maxime.ripard@free-electrons.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The CPU_MAP register is duplicated for each CPUs at different addresses, each instance being at a different address. However, the code so far was using CONFIG_NR_CPUS to initialise the CPU_MAP registers for each registers, while the SoCs embed at most 4 CPUs. This is especially an issue with multi_v7_defconfig, where CONFIG_NR_CPUS is currently set to 16, resulting in writes to registers that are not CPU_MAP. Fixes: c5aff18204da ("net: mvneta: driver for Marvell Armada 370/XP network unit") Signed-off-by: Maxime Ripard Cc: # v3.8+ --- drivers/net/ethernet/marvell/mvneta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index ce5f7f9cff06..b7717375ec4d 100644 --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c @@ -948,7 +948,7 @@ static void mvneta_defaults_set(struct mvneta_port *pp) /* Set CPU queue access map - all CPUs have access to all RX * queues and to all TX queues */ - for (cpu = 0; cpu < CONFIG_NR_CPUS; cpu++) + for_each_present_cpu(cpu) mvreg_write(pp, MVNETA_CPU_MAP(cpu), (MVNETA_CPU_RXQ_ACCESS_ALL_MASK | MVNETA_CPU_TXQ_ACCESS_ALL_MASK));