From patchwork Sun Mar 1 06:08:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun Chandran X-Patchwork-Id: 444704 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id EB3791400B7 for ; Sun, 1 Mar 2015 17:09:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752046AbbCAGJR (ORCPT ); Sun, 1 Mar 2015 01:09:17 -0500 Received: from mail-pd0-f182.google.com ([209.85.192.182]:38473 "EHLO mail-pd0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751916AbbCAGJO (ORCPT ); Sun, 1 Mar 2015 01:09:14 -0500 Received: by pdbfl12 with SMTP id fl12so40389pdb.5 for ; Sat, 28 Feb 2015 22:09:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=L+C98qTWEO1n8RjIY21I2n/HzTT0VmP89eGkA5gUDx0=; b=Bs7yieOVUhUhQ4E3GgFlAWk3Aog8LWuPUaEZuiwP5JaJxBULACYDnIjyJGNNk4RWGW N1xCPs5rZ5Lj5x/FSIMfI2QeVg0nTjJPMiPz2lLiIjMoQDpLPl6PE3APu5n53KFdroJ4 X/YgortdtTjYCJB/Mn/N3+D/XPWVFhRFBmc6B0K6B1Yix0XUnTYj8m3iDWlZwumRokwy eKcOV7HFU1tAy4S8HLeaocZqzfmS4pdSFqs8ORG0Vt92A5vZ8G/k5H9qOKGMBOxisiPN S2HdG4hiPzMWh1c5Wx64dJ58fHIu/AMlQoa1zV+zxuK2bnFvw6JKSOWu2T5JHx+fUcEc UgBQ== X-Gm-Message-State: ALoCoQmxWBNtPGCOpqxE79a7HdNaG1fUNZB8RBU18TRQIijz3PzyQTK+2ODm/6SNgMPuHuJY+Tso X-Received: by 10.66.218.231 with SMTP id pj7mr36017167pac.147.1425190154023; Sat, 28 Feb 2015 22:09:14 -0800 (PST) Received: from arun-OptiPlex-9010.mvista.com ([111.93.218.67]) by mx.google.com with ESMTPSA id qm12sm8348850pdb.36.2015.02.28.22.09.11 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 28 Feb 2015 22:09:13 -0800 (PST) From: Arun Chandran To: David Miller Cc: Nicolas Ferre , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Michal Simek , Arun Chandran Subject: [PATCH 2/2] net: macb: Properly add DMACFG bit definitions Date: Sun, 1 Mar 2015 11:38:03 +0530 Message-Id: <1425190083-16007-2-git-send-email-achandran@mvista.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1425190083-16007-1-git-send-email-achandran@mvista.com> References: <20150227.172430.705343480463996651.davem@davemloft.net> <1425190083-16007-1-git-send-email-achandran@mvista.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add *_SIZE macros for the bits ENDIA_DESC and ENDIA_PKT Signed-off-by: Arun Chandran Acked-by: Nicolas Ferre --- * Correct these macros according to comments from Nicolas Ferre. Also add his Acked-by --- --- drivers/net/ethernet/cadence/macb.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 57f0a1a..83241c8 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -230,8 +230,9 @@ #define GEM_FBLDO_OFFSET 0 /* fixed burst length for DMA */ #define GEM_FBLDO_SIZE 5 #define GEM_ENDIA_DESC_OFFSET 6 /* endian swap mode for management descriptor access */ +#define GEM_ENDIA_DESC_SIZE 1 #define GEM_ENDIA_PKT_OFFSET 7 /* endian swap mode for packet data access */ -#define GEM_ENDIA_SIZE 1 +#define GEM_ENDIA_PKT_SIZE 1 #define GEM_RXBMS_OFFSET 8 /* RX packet buffer memory size select */ #define GEM_RXBMS_SIZE 2 #define GEM_TXPBMS_OFFSET 10 /* TX packet buffer memory size select */