From patchwork Wed Jan 7 05:35:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 425936 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 113CF14009B for ; Wed, 7 Jan 2015 16:36:28 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752668AbbAGFgC (ORCPT ); Wed, 7 Jan 2015 00:36:02 -0500 Received: from mail-pd0-f172.google.com ([209.85.192.172]:47297 "EHLO mail-pd0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752448AbbAGFgA (ORCPT ); Wed, 7 Jan 2015 00:36:00 -0500 Received: by mail-pd0-f172.google.com with SMTP id y13so2469594pdi.3 for ; Tue, 06 Jan 2015 21:36:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=BBW069UwrTPKaaFEnRq14wxzlvjrKg/FgH04kMyz6DA=; b=YHecE+KdCyEY/Nja7cYOx9NkNj5U0BFefa+aTE2U2RwawF1XIKbFfQznjftUHaCcFF ceiTq0t3xpyuSF3V5LjxEHl2wcSxy0DoESs3xICW3eqGn6b9IBTGTmZWqzdbR1NeNDD3 Pi3kqqtVtFZuzgKYdkPvsP52OTzCx+aC/TML+NgXIySIQP0gGAyzBSjURParCSFqszEl JihQvoWJVUIB/IKzNkjacj2MFmbzWIojIUAjrmUJB9J6B09XRbz4n0JsbAWtLHtvwmwx kvjFnkhPCQYpYbZ4SEfKd/Wt1CsU/LeolAusti78a9g7dsTbVl4p64xspblTdLWxIFKE JNSQ== X-Gm-Message-State: ALoCoQlwEf0PYG/YQ/zIykBNpbSpOWNQjp0ChvHk+TaOkmo2L9k/FTGo25w/TIS3hnAgXC77lyVW X-Received: by 10.68.136.163 with SMTP id qb3mr1905359pbb.63.1420608960326; Tue, 06 Jan 2015 21:36:00 -0800 (PST) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id vc6sm531960pbc.66.2015.01.06.21.35.57 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 06 Jan 2015 21:35:59 -0800 (PST) From: Nobuhiro Iwamatsu To: netdev@vger.kernel.org Cc: yoshihiro.shimoda.uh@renesas.com, linux-sh@vger.kernel.org, Nobuhiro Iwamatsu Subject: [PATCH] sh_eth: Fix access to TRSCER register Date: Wed, 7 Jan 2015 14:35:47 +0900 Message-Id: <1420608947-6861-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 2.1.3 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org TRSCER register is configured differently by SoCs. TRSCER of R-Car is RINT8 bit only valid, other bits are reserved bits. This removes access to TRSCER register reserve bit. Signed-off-by: Nobuhiro Iwamatsu --- drivers/net/ethernet/renesas/sh_eth.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index c29ba80..59ee457 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c @@ -1294,7 +1294,11 @@ static int sh_eth_dev_init(struct net_device *ndev, bool start) /* Frame recv control (enable multiple-packets per rx irq) */ sh_eth_write(ndev, RMCR_RNC, RMCR); - sh_eth_write(ndev, DESC_I_RINT8 | DESC_I_RINT5 | DESC_I_TINT2, TRSCER); + if (mdp->cd->register_type == SH_ETH_REG_FAST_RCAR) + sh_eth_write(ndev, DESC_I_RINT8, TRSCER); + else + sh_eth_write(ndev, DESC_I_RINT8 | DESC_I_RINT5 | DESC_I_TINT2, + TRSCER); if (mdp->cd->bculr) sh_eth_write(ndev, 0x800, BCULR); /* Burst sycle set */