From patchwork Mon Dec 15 08:39:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhu Yanjun X-Patchwork-Id: 421006 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 473691400D2 for ; Mon, 15 Dec 2014 19:39:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751795AbaLOIjy (ORCPT ); Mon, 15 Dec 2014 03:39:54 -0500 Received: from mail-pd0-f174.google.com ([209.85.192.174]:47199 "EHLO mail-pd0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751740AbaLOIjx (ORCPT ); Mon, 15 Dec 2014 03:39:53 -0500 Received: by mail-pd0-f174.google.com with SMTP id fp1so11205919pdb.19 for ; Mon, 15 Dec 2014 00:39:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Z28py/DuGGZ/OBEjpuwRNo9ow3CldvmpTa1ZUEj71ps=; b=ZWcvWzOvvt3qOMBjJYs5Od/RbGHmGmSieDF5zfKShY7twGmJltRYMTybmt28gdRxky 0LkBb4uf9QaVhxoRNwWsWRndV9tyz6r+3xI7OB3YsFb4tNxRWJHuI28p82b9h/ffKqe9 7y9G23VpMbfBWLl9ovPCI9xTrgAneQqylmVQZR4hgieodccZMK97mRToKHJocy9xGnQU WZjYYEI2kXie94g2vEgJMe00D/HJEkTiGOWzw3UTV2ecC1A7RThyTNc0HTTrrBH6P7d9 Yc/TdkBfBhZGH79R9cr0uBl9Sv5BOHMWsocLyznNZU2atCsx5nIpE0wtb3RLB0r5agIQ oOlw== X-Received: by 10.70.46.169 with SMTP id w9mr4794326pdm.47.1418632792655; Mon, 15 Dec 2014 00:39:52 -0800 (PST) Received: from wind-OptiPlex-780.corp.ad.wrs.com ([106.120.101.38]) by mx.google.com with ESMTPSA id wf5sm8560115pab.40.2014.12.15.00.39.48 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 15 Dec 2014 00:39:51 -0800 (PST) From: Zhu Yanjun X-Google-Original-From: Zhu Yanjun To: netdev@vger.kernel.org, w@1wt.eu, zyjzyj2000@gmail.com Cc: Zhu Yanjun , Bruce Allan , Jeff Kirsher Subject: [PATCH 4/5] e1000e: update workaround for 82579 intermittently disabled during S0->Sx Date: Mon, 15 Dec 2014 16:39:13 +0800 Message-Id: <1418632754-16698-5-git-send-email-Yanjun.Zhu@windriver.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1418632754-16698-1-git-send-email-Yanjun.Zhu@windriver.com> References: <1418632754-16698-1-git-send-email-Yanjun.Zhu@windriver.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org 2.6.x kernels require a similar logic change as commit c6f8b74f [e1000e: update workaround for 82579 intermittently disabled during S0->Sx] introduces for newer kernels. The workaround which toggles the LANPHYPC (LAN PHY Power Control) value bit to force the MAC-Phy interconnect into PCIe mode from SMBus mode during driver load and resume should always be done except if PHY resets are blocked by the Manageability Engine (ME). Previously, the toggle was done only if PHY resets are blocked and the ME was disabled. The rest of the patch is just indentation changes as a consequence of the updated workaround. [yanjun.zhu: indentation changes are removed. function e1000_init_phy_workarounds_pchlan does not exist] Signed-off-by: Bruce Allan Tested-by: Aaron Brown Signed-off-by: Jeff Kirsher Signed-off-by: Zhu Yanjun --- drivers/net/e1000e/ich8lan.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index 8c7e4aa..0da2c2c 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c @@ -280,8 +280,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) phy->ops.write_phy_reg_locked = e1000_write_phy_reg_hv_locked; phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; - if (!(er32(FWSM) & E1000_ICH_FWSM_FW_VALID) && - !e1000_check_reset_block(hw)) { + if (!e1000_check_reset_block(hw)) { /*Set Phy Config Counter to 50msec */ ctrl = er32(FEXTNVM3); ctrl &= ~E1000_FEXTNVM3_PHY_CFG_COUNTER_MASK;