From patchwork Wed Oct 29 10:45:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dong Aisheng X-Patchwork-Id: 404627 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 8C5E3140085 for ; Thu, 30 Oct 2014 00:25:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932890AbaJ2NZ1 (ORCPT ); Wed, 29 Oct 2014 09:25:27 -0400 Received: from mail-bn1bon0144.outbound.protection.outlook.com ([157.56.111.144]:34749 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932595AbaJ2NZ0 (ORCPT ); Wed, 29 Oct 2014 09:25:26 -0400 Received: from DM2PR03MB336.namprd03.prod.outlook.com (10.141.54.25) by DM2PR03MB352.namprd03.prod.outlook.com (10.141.54.24) with Microsoft SMTP Server (TLS) id 15.1.11.9; Wed, 29 Oct 2014 11:51:41 +0000 Received: from BN3PR0301CA0071.namprd03.prod.outlook.com (25.160.152.167) by DM2PR03MB336.namprd03.prod.outlook.com (10.141.54.25) with Microsoft SMTP Server (TLS) id 15.1.11.9; Wed, 29 Oct 2014 11:51:40 +0000 Received: from BL2FFO11FD056.protection.gbl (2a01:111:f400:7c09::176) by BN3PR0301CA0071.outlook.office365.com (2a01:111:e400:401e::39) with Microsoft SMTP Server (TLS) id 15.1.11.14 via Frontend Transport; Wed, 29 Oct 2014 11:51:39 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD056.mail.protection.outlook.com (10.173.161.184) with Microsoft SMTP Server (TLS) id 15.0.1049.20 via Frontend Transport; Wed, 29 Oct 2014 11:51:39 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s9TBpOFN024329; Wed, 29 Oct 2014 04:51:36 -0700 From: Dong Aisheng To: CC: , , , , , , Subject: [PATCH 4/7] can: m_can: add a bit delay after setting CCCR_INIT bit Date: Wed, 29 Oct 2014 18:45:24 +0800 Message-ID: <1414579527-31100-4-git-send-email-b29396@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1414579527-31100-1-git-send-email-b29396@freescale.com> References: <1414579527-31100-1-git-send-email-b29396@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(199003)(189002)(89996001)(104166001)(50226001)(62966002)(88136002)(21056001)(87286001)(97736003)(87936001)(64706001)(31966008)(106466001)(33646002)(36756003)(95666004)(107046002)(104016003)(229853001)(6806004)(85852003)(4396001)(2351001)(77156001)(105606002)(44976005)(92566001)(19580405001)(50466002)(92726001)(93916002)(68736004)(48376002)(20776003)(47776003)(26826002)(110136001)(84676001)(46102003)(80022003)(76176999)(120916001)(102836001)(85306004)(19580395003)(76482002)(50986999)(99396003)(42262002); DIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR03MB336; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:DM2PR03MB336; X-Forefront-PRVS: 03793408BA Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Aisheng.Dong@freescale.com; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:DM2PR03MB352; X-OriginatorOrg: freescale.com Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The spec mentions there may be a delay until the value written to INIT can be read back due to the synchronization mechanism between the two clock domains. But it does not indicate the exact clock cycles needed. The 5us delay is a test value and seems ok. Without the delay, CCCR.CCE bit may fail to be set and then the initialization fail sometimes when do repeatly up and down. Signed-off-by: Dong Aisheng --- drivers/net/can/m_can/m_can.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c index e4ef146..6160b9c 100644 --- a/drivers/net/can/m_can/m_can.c +++ b/drivers/net/can/m_can/m_can.c @@ -296,6 +296,7 @@ static inline void m_can_config_endisable(const struct m_can_priv *priv, if (enable) { /* enable m_can configuration */ m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT); + udelay(5); /* CCCR.CCE can only be set/reset while CCCR.INIT = '1' */ m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT | CCCR_CCE); } else {