From patchwork Wed Oct 22 18:26:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 402254 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 6A5B9140076 for ; Thu, 23 Oct 2014 05:31:59 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755086AbaJVS30 (ORCPT ); Wed, 22 Oct 2014 14:29:26 -0400 Received: from mail-wi0-f181.google.com ([209.85.212.181]:34513 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754592AbaJVS1F (ORCPT ); Wed, 22 Oct 2014 14:27:05 -0400 Received: by mail-wi0-f181.google.com with SMTP id n3so1690404wiv.8 for ; Wed, 22 Oct 2014 11:27:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :content-type:content-transfer-encoding; bh=B6VK/OU86Gr5/9CMWZ+mUEkQVwkRC0nYE3fgbm8ehW0=; b=suSW3ruj/e1l0lYJtkrBiXvNKOinU8s/Bd3SIme9whmkQkXQyk28m4E1tMXKqV9yOp lE0s1Q663zDiAYgFS9yrhccUy2pio4qu5fWko589M5cvAXQEygK5vtJJ4Y4DvFh8qEtE lm1H85zmbuqSBk+y8YO5Epxtp5vkiAOs9IORMZgS6uX4D8mCrRJ3F/dTNZQPWe5kQukL MmEGW4EVszDHO068e10aPgZ/vEpePwx74iiuigxRlgI2SKqbi08ogjbAEsBTs6SK/RHu vgYYARjcEbR5K48+xjfWF3PpsAGLK0pVfHd90D9KCSOEs1C1LQbvEyXV8Wq/Yr4K9dP3 eGFQ== X-Received: by 10.180.20.43 with SMTP id k11mr7845904wie.28.1414002423598; Wed, 22 Oct 2014 11:27:03 -0700 (PDT) Received: from topkick.lan (f050234052.adsl.alicedsl.de. [78.50.234.52]) by mx.google.com with ESMTPSA id ga7sm2804033wic.5.2014.10.22.11.27.02 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Oct 2014 11:27:02 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Cc: "David S. Miller" , =?UTF-8?q?Antoine=20T=C3=A9nart?= , Florian Fainelli , Eric Miao , Haojian Zhuang , linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/9] ARM: berlin: Add BG2 ethernet DT nodes Date: Wed, 22 Oct 2014 20:26:49 +0200 Message-Id: <1414002412-13615-7-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1414002412-13615-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1414002412-13615-1-git-send-email-sebastian.hesselbarth@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Marvell BG2 has two fast ethernet controllers with internal PHY, add the corresponding nodes to SoC dtsi. Tested-by: Antoine Ténart Reviewed-by: Florian Fainelli Signed-off-by: Sebastian Hesselbarth --- Changelog: v1->v2: - move phy-connection-type to controller node instead of PHY node (Reported by Sergei Shtylyov) Cc: "David S. Miller" Cc: "Antoine Ténart" Cc: Florian Fainelli Cc: Eric Miao Cc: Haojian Zhuang Cc: linux-arm-kernel@lists.infradead.org Cc: netdev@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/berlin2.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi index 9d7c810ebd0b..dc0227dfc691 100644 --- a/arch/arm/boot/dts/berlin2.dtsi +++ b/arch/arm/boot/dts/berlin2.dtsi @@ -79,11 +79,47 @@ clocks = <&chip CLKID_TWD>; }; + eth1: ethernet@b90000 { + compatible = "marvell,pxa168-eth"; + reg = <0xb90000 0x10000>; + clocks = <&chip CLKID_GETH1>; + interrupts = ; + /* set by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + #address-cells = <1>; + #size-cells = <0>; + phy-connection-type = "mii"; + phy-handle = <ðphy1>; + status = "disabled"; + + ethphy1: ethernet-phy@0 { + reg = <0>; + }; + }; + cpu-ctrl@dd0000 { compatible = "marvell,berlin-cpu-ctrl"; reg = <0xdd0000 0x10000>; }; + eth0: ethernet@e50000 { + compatible = "marvell,pxa168-eth"; + reg = <0xe50000 0x10000>; + clocks = <&chip CLKID_GETH0>; + interrupts = ; + /* set by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + #address-cells = <1>; + #size-cells = <0>; + phy-connection-type = "mii"; + phy-handle = <ðphy0>; + status = "disabled"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + }; + apb@e80000 { compatible = "simple-bus"; #address-cells = <1>;