From patchwork Tue Oct 21 08:53:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 401364 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 17AA7140077 for ; Tue, 21 Oct 2014 19:55:22 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754765AbaJUIyO (ORCPT ); Tue, 21 Oct 2014 04:54:14 -0400 Received: from mail-wi0-f169.google.com ([209.85.212.169]:51989 "EHLO mail-wi0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754644AbaJUIyC (ORCPT ); Tue, 21 Oct 2014 04:54:02 -0400 Received: by mail-wi0-f169.google.com with SMTP id r20so1279953wiv.4 for ; Tue, 21 Oct 2014 01:54:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :content-type:content-transfer-encoding; bh=mZjRfg8VIVRvW+U2EvJnlIhn+uY+9d6BDBUThbStqSI=; b=f/JOVEsXqYy/K+bu4xIJnV6vKxRIJJ1/G98gaWu3ep4sx7aGarPJJAj2BYoK+5eUDJ sjSRKz3g3nntTPuKiT5NYQ479zTJyO6hu8Udj+yLqW2hg71LFsxSL0fHdzwo+x63vf9Q iJGIb/ZSTOVOKJlVgfDozRwh7yk6Lc5wgrlOl5+tR6ZLp8zMXiXgD86ggbkSdIHXiA7R Z2lzESPDBM1MwNFFJ3BfN/iV5E7Tu8q8ofauJ2SHLTcYPKz40JiN4O0hpa5JqKtXTeMI Gp6ILW8desLDZpmFv1fH72lwWF82ZW4D/v8YZumVQASxLZgaya0XvaLM+gRvNLS12COi Hj+Q== X-Received: by 10.180.198.234 with SMTP id jf10mr26601068wic.68.1413881640843; Tue, 21 Oct 2014 01:54:00 -0700 (PDT) Received: from topkick.lan (f052063137.adsl.alicedsl.de. [78.52.63.137]) by mx.google.com with ESMTPSA id t9sm14626923wjf.41.2014.10.21.01.53.58 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 Oct 2014 01:53:59 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Cc: "David S. Miller" , =?UTF-8?q?Antoine=20T=C3=A9nart?= , Florian Fainelli , Eric Miao , Haojian Zhuang , linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 7/9] ARM: berlin: Add BG2CD ethernet DT nodes Date: Tue, 21 Oct 2014 10:53:45 +0200 Message-Id: <1413881627-21639-8-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1413881627-21639-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1413881627-21639-1-git-send-email-sebastian.hesselbarth@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Marvell BG2CD has two fast ethernet controllers with internal PHY, add the corresponding nodes to SoC dtsi. Tested-by: Antoine Ténart Signed-off-by: Sebastian Hesselbarth --- Cc: "David S. Miller" Cc: "Antoine Ténart" Cc: Florian Fainelli Cc: Eric Miao Cc: Haojian Zhuang Cc: linux-arm-kernel@lists.infradead.org Cc: netdev@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/berlin2cd.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi index cc1df65da504..8ce73a0a23a3 100644 --- a/arch/arm/boot/dts/berlin2cd.dtsi +++ b/arch/arm/boot/dts/berlin2cd.dtsi @@ -66,6 +66,42 @@ clocks = <&chip CLKID_TWD>; }; + eth1: ethernet@b90000 { + compatible = "marvell,pxa168-eth"; + reg = <0xb90000 0x10000>; + clocks = <&chip CLKID_GETH1>; + interrupts = ; + /* set by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + #address-cells = <1>; + #size-cells = <0>; + phy-handle = <ðphy1>; + status = "disabled"; + + ethphy1: ethernet-phy@0 { + phy-connection-type = "mii"; + reg = <0>; + }; + }; + + eth0: ethernet@e50000 { + compatible = "marvell,pxa168-eth"; + reg = <0xe50000 0x10000>; + clocks = <&chip CLKID_GETH0>; + interrupts = ; + /* set by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + #address-cells = <1>; + #size-cells = <0>; + phy-handle = <ðphy0>; + status = "disabled"; + + ethphy0: ethernet-phy@0 { + phy-connection-type = "mii"; + reg = <0>; + }; + }; + apb@e80000 { compatible = "simple-bus"; #address-cells = <1>;