From patchwork Thu Oct 9 12:39:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 398019 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 296471400B2 for ; Thu, 9 Oct 2014 23:41:25 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932238AbaJIMkl (ORCPT ); Thu, 9 Oct 2014 08:40:41 -0400 Received: from mail-wi0-f172.google.com ([209.85.212.172]:54385 "EHLO mail-wi0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755010AbaJIMjX (ORCPT ); Thu, 9 Oct 2014 08:39:23 -0400 Received: by mail-wi0-f172.google.com with SMTP id n3so12959967wiv.17 for ; Thu, 09 Oct 2014 05:39:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :content-type:content-transfer-encoding; bh=FUG84H8hOye575PGPY/Tdjxw2H79XaQoUVXurPfyMkQ=; b=Szrgx/7R7ZDeo5WvlYfeM5s1xr0BR6gH77F1xjiaROUQM+/pER8JLLlBKBX/DD8XeH o1OlRA0mqEsMgxSzIBu5290Vbjx+4ZIUztSqwqo9Dc+FewBYo2pqK+vJa7Jv4MraNG0Q 9rnuQk5FXICSSzNklVheZiOuCeYwpXOPS1/B96dJhpHHCqYE7XzjsM70+qtICWLPTKm+ ApiwOgAq9OV6qNDxoo1tiBHCJneYm/vC84efUJg5eHu5EqyBtBUKLI3E1cbBnb/Ijb5t JhKSJEgKahN1eWzpWr3dwJNj0frNsddZsTl3MRGHdRYM/XOuqTArwE7epw5SCFIKyG34 xtxg== X-Received: by 10.180.189.180 with SMTP id gj20mr40358352wic.58.1412858360293; Thu, 09 Oct 2014 05:39:20 -0700 (PDT) Received: from topkick.lan (f052024004.adsl.alicedsl.de. [78.52.24.4]) by mx.google.com with ESMTPSA id mc4sm5461773wic.6.2014.10.09.05.39.18 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Oct 2014 05:39:19 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Cc: "David S. Miller" , =?UTF-8?q?Antoine=20T=C3=A9nart?= , Florian Fainelli , Eric Miao , Haojian Zhuang , linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH RFT 6/8] ARM: berlin: Add BG2 ethernet DT nodes Date: Thu, 9 Oct 2014 14:39:04 +0200 Message-Id: <1412858346-11334-7-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1412858346-11334-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1412858346-11334-1-git-send-email-sebastian.hesselbarth@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Marvell BG2 has two fast ethernet controllers with internal PHY, add the corresponding nodes to SoC dtsi. Signed-off-by: Sebastian Hesselbarth --- Cc: "David S. Miller" Cc: "Antoine Ténart" Cc: Florian Fainelli Cc: Eric Miao Cc: Haojian Zhuang Cc: linux-arm-kernel@lists.infradead.org Cc: netdev@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/berlin2.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi index d7e81e124de0..5f82dcfc6ac6 100644 --- a/arch/arm/boot/dts/berlin2.dtsi +++ b/arch/arm/boot/dts/berlin2.dtsi @@ -79,11 +79,47 @@ clocks = <&chip CLKID_TWD>; }; + eth1: ethernet@b90000 { + compatible = "marvell,pxa168-eth"; + reg = <0xb90000 0x10000>; + clocks = <&chip CLKID_GETH1>; + interrupts = ; + /* set by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + #address-cells = <1>; + #size-cells = <0>; + phy-handle = <ðphy1>; + status = "disabled"; + + ethphy1: ethernet-phy@0 { + phy-connection-type = "mii"; + reg = <0>; + }; + }; + cpu-ctrl@dd0000 { compatible = "marvell,berlin-cpu-ctrl"; reg = <0xdd0000 0x10000>; }; + eth0: ethernet@e50000 { + compatible = "marvell,pxa168-eth"; + reg = <0xe50000 0x10000>; + clocks = <&chip CLKID_GETH0>; + interrupts = ; + /* set by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + #address-cells = <1>; + #size-cells = <0>; + phy-handle = <ðphy0>; + status = "disabled"; + + ethphy0: ethernet-phy@0 { + phy-connection-type = "mii"; + reg = <0>; + }; + }; + apb@e80000 { compatible = "simple-bus"; #address-cells = <1>;