From patchwork Thu Jun 5 12:58:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Brodkin X-Patchwork-Id: 356376 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 1DDAB1400DE for ; Thu, 5 Jun 2014 22:58:32 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751384AbaFEM6O (ORCPT ); Thu, 5 Jun 2014 08:58:14 -0400 Received: from smtprelay4.synopsys.com ([198.182.44.111]:59196 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750926AbaFEM6M (ORCPT ); Thu, 5 Jun 2014 08:58:12 -0400 Received: from us02secmta2.synopsys.com (us02secmta2.synopsys.com [10.12.235.98]) by smtprelay.synopsys.com (Postfix) with ESMTP id 7D89D24E0ECC; Thu, 5 Jun 2014 05:58:07 -0700 (PDT) Received: from us02secmta2.internal.synopsys.com (us02secmta2.internal.synopsys.com [127.0.0.1]) by us02secmta2.internal.synopsys.com (Service) with ESMTP id 4458055F13; Thu, 5 Jun 2014 05:58:07 -0700 (PDT) Received: from mailhost.synopsys.com (mailhost3.synopsys.com [10.12.238.238]) by us02secmta2.internal.synopsys.com (Service) with ESMTP id 102C355F02; Thu, 5 Jun 2014 05:58:07 -0700 (PDT) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id F1EA821C; Thu, 5 Jun 2014 05:58:06 -0700 (PDT) Received: from abrodkin-8560l.internal.synopsys.com (abrodkin-8560l.internal.synopsys.com [10.121.8.83]) by mailhost.synopsys.com (Postfix) with ESMTP id 94B20208; Thu, 5 Jun 2014 05:58:04 -0700 (PDT) From: Alexey Brodkin To: netdev@vger.kernel.org Cc: Alexey Brodkin , "David S. Miller" , Hans de Goede , Giuseppe Cavallaro , Chen-Yu Tsai , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Vineet Gupta Subject: [PATCH] stmmac: extend DMA initialization delay to 2.5 seconds Date: Thu, 5 Jun 2014 16:58:00 +0400 Message-Id: <1401973080-10085-1-git-send-email-abrodkin@synopsys.com> X-Mailer: git-send-email 1.9.3 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On some platforms existing 100 msecond delay is not enough for DMA block to recover after reset. This is because MAC DMA waits for all PHY input clocks to present and depending on the board reset bit deassertion may take much longer than previously used 100 milliseconds I have a board that requires more than 2 seconds for DMA to zero "reset" bit. If for other boards it's still not long enough this value should be extended once again. In the same change I convert "mdelay" to "msleep" to make CPU available for other processes during DMA init delay which is especially useful in case of delay for a few seconds. Signed-off-by: Alexey Brodkin Cc: David S. Miller Cc: Hans de Goede Cc: Giuseppe Cavallaro Cc: Chen-Yu Tsai Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Vineet Gupta --- drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c | 4 ++-- drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c index 0c2058a..f713ea7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c @@ -39,11 +39,11 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb, /* DMA SW reset */ value |= DMA_BUS_MODE_SFT_RESET; writel(value, ioaddr + DMA_BUS_MODE); - limit = 10; + limit = 100; while (limit--) { if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET)) break; - mdelay(10); + msleep(25); } if (limit < 0) return -EBUSY; diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c index 7d1dce9..043585f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c @@ -41,11 +41,11 @@ static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb, /* DMA SW reset */ value |= DMA_BUS_MODE_SFT_RESET; writel(value, ioaddr + DMA_BUS_MODE); - limit = 10; + limit = 100; while (limit--) { if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET)) break; - mdelay(10); + msleep(25); } if (limit < 0) return -EBUSY;