From patchwork Mon Feb 24 22:34:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Mason X-Patchwork-Id: 323793 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 91F0A2C0227 for ; Tue, 25 Feb 2014 09:34:42 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752920AbaBXWej (ORCPT ); Mon, 24 Feb 2014 17:34:39 -0500 Received: from mail-pa0-f42.google.com ([209.85.220.42]:36018 "EHLO mail-pa0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752905AbaBXWeh (ORCPT ); Mon, 24 Feb 2014 17:34:37 -0500 Received: by mail-pa0-f42.google.com with SMTP id kl14so7221393pab.1 for ; Mon, 24 Feb 2014 14:34:37 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KmZv/nGF7tfCZElanGpwN7JkGThNE05aGs7DJ8KYB/g=; b=M+sISHZYDoIx6T+3A2WIY4o36jRDz4cEjZdIrRHkl3kzN8o9XaB/aJzWo0d05AiFRn IKZlYAZ0igLSsncTvTGGL6COpyiT/pOQg1NXl2vfNyMJYbIsScMYfxptRDFrD0iC96Yw Jd4xqJ8E3ryFaoP+I38WfpOG1kRTXBlhphr8wvBLI6YT3odrPV4tMbrbl6UmJOOlV4gD vLx9b8rNS1pWJTNsTh57KDcpWYxiYOcYo0xemhHge8FT4RH+LGlV/XHJZy7Y75Cu8Lvi rzSVyXBJU4OAhZhKzuKAVbksxO5BdIcBU4Jkst6YCQm6PtrOCjGIFIKYTJs31zVTPA+R RxGA== X-Gm-Message-State: ALoCoQlz4sqN8ayQe8uWfBEthNJMeZSA9UNKgeXjYp5HwF5VljAZH5w0L+L6JUpQHDoHVe/kdtmD X-Received: by 10.68.4.232 with SMTP id n8mr2398861pbn.114.1393281277105; Mon, 24 Feb 2014 14:34:37 -0800 (PST) Received: from nas (184-98-202-49.phnx.qwest.net. [184.98.202.49]) by mx.google.com with ESMTPSA id lh13sm128546979pab.4.2014.02.24.14.34.33 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 24 Feb 2014 14:34:35 -0800 (PST) Received: by nas (sSMTP sendmail emulation); Mon, 24 Feb 2014 15:34:12 -0700 From: Jon Mason To: netdev@vger.kernel.org Cc: Nithin Nayak Sujir , Michael Chan Subject: [RFC 2/3] tg3: Use pci_set_power_state() for setting PM states Date: Mon, 24 Feb 2014 15:34:04 -0700 Message-Id: <1393281245-3951-2-git-send-email-jdmason@kudzu.us> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1393281245-3951-1-git-send-email-jdmason@kudzu.us> References: <1393281245-3951-1-git-send-email-jdmason@kudzu.us> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Use the existing infrastructure of pci_set_power_state() instead of setting the relevant bits via PCI config read/write in the driver. Also, use pci_pme_active() to set the PCI_PM_CTRL_PME_ENABLE bit in PCI PM control register. pci_set_power_state() and pci_pme_active() perform the same operations as the driver did before, so there should be no functional change. That being said, this has not been tested. Signed-off-by: Jon Mason Cc: Nithin Nayak Sujir Cc: Michael Chan Acked-by: Michael Chan --- drivers/net/ethernet/broadcom/tg3.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 3167ed6..36c3fd9 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c @@ -16362,22 +16362,14 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent) * for all chip writes not to mailbox registers. */ if (tg3_flag(tp, PCIX_MODE)) { - u32 pm_reg; - tg3_flag_set(tp, PCIX_TARGET_HWBUG); /* The chip can have it's power management PCI config * space registers clobbered due to this bug. * So explicitly force the chip into D0 here. */ - pci_read_config_dword(tp->pdev, - tp->pdev->pm_cap + PCI_PM_CTRL, - &pm_reg); - pm_reg &= ~PCI_PM_CTRL_STATE_MASK; - pm_reg |= PCI_PM_CTRL_PME_ENABLE | 0 /* D0 */; - pci_write_config_dword(tp->pdev, - tp->pdev->pm_cap + PCI_PM_CTRL, - pm_reg); + pci_set_power_state(tp->pdev, PCI_D0); + pci_pme_active(tp->pdev, true); /* Also, force SERR#/PERR# in PCI command. */ pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);