From patchwork Fri May 31 06:08:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 247847 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 5D6FC2C016A for ; Fri, 31 May 2013 16:08:47 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752452Ab3EaGIn (ORCPT ); Fri, 31 May 2013 02:08:43 -0400 Received: from mail-ea0-f182.google.com ([209.85.215.182]:58691 "EHLO mail-ea0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752041Ab3EaGIg (ORCPT ); Fri, 31 May 2013 02:08:36 -0400 Received: by mail-ea0-f182.google.com with SMTP id r16so1154053ead.13 for ; Thu, 30 May 2013 23:08:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:in-reply-to:references:content-type:x-gm-message-state; bh=7lWAl3SQ7xFT/o8E3kNyUi6uT9Oa7dbf5H8PvTyrR7U=; b=mUJt4kT+UNOGgJRB1RLiVSbK75OuZa4BS7OfZLBnWb7qmqF5N9l/tpoSLOjLNpAmkJ K4G+D4X3pB9N3Mev4vLVSAccvwjUIwE7wWW/oJ25ddsP8O9t407lm2k1NYqX89REztd9 N9sl37xVLd0KGEAw5Y3taDfQIDcADDL+I0Z+5lVwvjnVoKwa6aWbQOR7MQBC9LY3v/+T TtiJHMHyqjN+t6X326k/t2OQP1ApcfzJ3DLPRWyWJ++dZjfbh2vJmzak2TziJrUE+FXv e3xk2saI9DYEKh/XMkMcMTw+PKZNUNK3n13ffJ//+fWD21SkNItJsN8+ZNX1jXh1miXm pAEw== X-Received: by 10.15.35.71 with SMTP id f47mr12423377eev.15.1369980515119; Thu, 30 May 2013 23:08:35 -0700 (PDT) Received: from localhost (nat-63.starnet.cz. [178.255.168.63]) by mx.google.com with ESMTPSA id e1sm30341081eem.10.2013.05.30.23.08.34 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Thu, 30 May 2013 23:08:34 -0700 (PDT) From: Michal Simek To: linux-kernel@vger.kernel.org Cc: Michal Simek , Michal Simek , "David S. Miller" , Stephen Hemminger , Christian Hohnstaedt , netdev@vger.kernel.org Subject: [PATCH v2 1/5] phy: Clean coding style in vitesse phy Date: Fri, 31 May 2013 08:08:23 +0200 Message-Id: <131c9262c3094ee3c664bd729a66e0709ceae82c.1369980470.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQlHRBgshm9mlEFb7RzanTun331mUlVV5+/oM1BxMeMoXMtCT0643FYawnlsOaRdB5qjYZAJ Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org - Remove trailing white space - Remove spaces before tag - Fix comments Signed-off-by: Michal Simek --- Changes in v2: None drivers/net/phy/vitesse.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) -- 1.8.2.3 diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c index 3492b53..d6e988f 100644 --- a/drivers/net/phy/vitesse.c +++ b/drivers/net/phy/vitesse.c @@ -44,12 +44,12 @@ #define MII_VSC8244_ISTAT_DUPLEX 0x1000 /* Vitesse Auxiliary Control/Status Register */ -#define MII_VSC8244_AUX_CONSTAT 0x1c -#define MII_VSC8244_AUXCONSTAT_INIT 0x0000 -#define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020 -#define MII_VSC8244_AUXCONSTAT_SPEED 0x0018 -#define MII_VSC8244_AUXCONSTAT_GBIT 0x0010 -#define MII_VSC8244_AUXCONSTAT_100 0x0008 +#define MII_VSC8244_AUX_CONSTAT 0x1c +#define MII_VSC8244_AUXCONSTAT_INIT 0x0000 +#define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020 +#define MII_VSC8244_AUXCONSTAT_SPEED 0x0018 +#define MII_VSC8244_AUXCONSTAT_GBIT 0x0010 +#define MII_VSC8244_AUXCONSTAT_100 0x0008 #define MII_VSC8221_AUXCONSTAT_INIT 0x0004 /* need to set this bit? */ #define MII_VSC8221_AUXCONSTAT_RESERVED 0x0004 @@ -100,9 +100,8 @@ static int vsc824x_config_init(struct phy_device *phydev) static int vsc824x_ack_interrupt(struct phy_device *phydev) { int err = 0; - - /* - * Don't bother to ACK the interrupts if interrupts + + /* Don't bother to ACK the interrupts if interrupts * are disabled. The 824x cannot clear the interrupts * if they are disabled. */ @@ -122,8 +121,7 @@ static int vsc82xx_config_intr(struct phy_device *phydev) MII_VSC8244_IMASK_MASK : MII_VSC8221_IMASK_MASK); else { - /* - * The Vitesse PHY cannot clear the interrupt + /* The Vitesse PHY cannot clear the interrupt * once it has disabled them, so we clear them first */ err = phy_read(phydev, MII_VSC8244_ISTAT); @@ -146,7 +144,8 @@ static int vsc8221_config_init(struct phy_device *phydev) return err; /* Perhaps we should set EXT_CON1 based on the interface? - Options are 802.3Z SerDes or SGMII */ + * Options are 802.3Z SerDes or SGMII + */ } /* Vitesse 824x */