From patchwork Wed May 29 15:33:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 247294 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 87FDE2C00AF for ; Thu, 30 May 2013 01:37:09 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757405Ab3E2PdX (ORCPT ); Wed, 29 May 2013 11:33:23 -0400 Received: from mail-wi0-f174.google.com ([209.85.212.174]:45627 "EHLO mail-wi0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756709Ab3E2PdU (ORCPT ); Wed, 29 May 2013 11:33:20 -0400 Received: by mail-wi0-f174.google.com with SMTP id c10so3663115wiw.7 for ; Wed, 29 May 2013 08:33:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:content-type :x-gm-message-state; bh=YnvJMYpy1ZyYHqD8ax5whx9BQQtP1PwRFi/TBQiD0ws=; b=K9WDqOAZkUdii/0rM7z66bbzmBrRe4ef21YlxyCBpewzxIjV+xtNlIj0o/fcy/0RtW tkMLv/sDd7LzuGJuT/8mb44wLMNmd7YirZr8R+QB4FFx9eBkZ1VBJN2u0CqPKscD6ZFL hMbypTduXLPNxYkM8F/0PxzzzOLVcBUml8cradSbylMDNLYnRB0WrztJuupjgI0FzxWQ CIzCoQM5FF0tPqf3Sf2OP64Ssc5Z1fvnigLTfB7vzhf23xDaiKa91LLt10xX2HbvQ1Qz ABKFdO4siCDQfeEKrmAlkHg9cxzKbfI0ei7hwsgoFwwQqxMTtXvlh4MkuJOKFnEgjYq4 AWIA== X-Received: by 10.180.184.112 with SMTP id et16mr15893735wic.58.1369841599078; Wed, 29 May 2013 08:33:19 -0700 (PDT) Received: from localhost (nat-63.starnet.cz. [178.255.168.63]) by mx.google.com with ESMTPSA id k10sm31955777wia.4.2013.05.29.08.33.17 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Wed, 29 May 2013 08:33:18 -0700 (PDT) From: Michal Simek To: linux-kernel@vger.kernel.org Cc: Michal Simek , Michal Simek , "David S. Miller" , Stephen Hemminger , Christian Hohnstaedt , netdev@vger.kernel.org Subject: [PATCH 01/11] phy: Clean coding style in vitesse phy Date: Wed, 29 May 2013 17:33:01 +0200 Message-Id: <131c9262c3094ee3c664bd729a66e0709ceae82c.1369841519.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.8.2.3 X-Gm-Message-State: ALoCoQnoOWrG6DNRNi8RioJk6k0uu/8oCs/nAtENR4D3g7iKGzx7wCb6MBnXyO3wflcATgy/cLmf Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org - Remove trailing white space - Remove spaces before tag - Fix comments Signed-off-by: Michal Simek --- drivers/net/phy/vitesse.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) -- 1.8.2.3 diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c index 3492b53..d6e988f 100644 --- a/drivers/net/phy/vitesse.c +++ b/drivers/net/phy/vitesse.c @@ -44,12 +44,12 @@ #define MII_VSC8244_ISTAT_DUPLEX 0x1000 /* Vitesse Auxiliary Control/Status Register */ -#define MII_VSC8244_AUX_CONSTAT 0x1c -#define MII_VSC8244_AUXCONSTAT_INIT 0x0000 -#define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020 -#define MII_VSC8244_AUXCONSTAT_SPEED 0x0018 -#define MII_VSC8244_AUXCONSTAT_GBIT 0x0010 -#define MII_VSC8244_AUXCONSTAT_100 0x0008 +#define MII_VSC8244_AUX_CONSTAT 0x1c +#define MII_VSC8244_AUXCONSTAT_INIT 0x0000 +#define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020 +#define MII_VSC8244_AUXCONSTAT_SPEED 0x0018 +#define MII_VSC8244_AUXCONSTAT_GBIT 0x0010 +#define MII_VSC8244_AUXCONSTAT_100 0x0008 #define MII_VSC8221_AUXCONSTAT_INIT 0x0004 /* need to set this bit? */ #define MII_VSC8221_AUXCONSTAT_RESERVED 0x0004 @@ -100,9 +100,8 @@ static int vsc824x_config_init(struct phy_device *phydev) static int vsc824x_ack_interrupt(struct phy_device *phydev) { int err = 0; - - /* - * Don't bother to ACK the interrupts if interrupts + + /* Don't bother to ACK the interrupts if interrupts * are disabled. The 824x cannot clear the interrupts * if they are disabled. */ @@ -122,8 +121,7 @@ static int vsc82xx_config_intr(struct phy_device *phydev) MII_VSC8244_IMASK_MASK : MII_VSC8221_IMASK_MASK); else { - /* - * The Vitesse PHY cannot clear the interrupt + /* The Vitesse PHY cannot clear the interrupt * once it has disabled them, so we clear them first */ err = phy_read(phydev, MII_VSC8244_ISTAT); @@ -146,7 +144,8 @@ static int vsc8221_config_init(struct phy_device *phydev) return err; /* Perhaps we should set EXT_CON1 based on the interface? - Options are 802.3Z SerDes or SGMII */ + * Options are 802.3Z SerDes or SGMII + */ } /* Vitesse 824x */