From patchwork Wed Oct 12 01:20:51 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Fleming X-Patchwork-Id: 119092 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 904C8B6F69 for ; Wed, 12 Oct 2011 12:21:32 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752027Ab1JLBVZ (ORCPT ); Tue, 11 Oct 2011 21:21:25 -0400 Received: from tx2ehsobe004.messaging.microsoft.com ([65.55.88.14]:25082 "EHLO TX2EHSOBE009.bigfish.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751159Ab1JLBVH (ORCPT ); Tue, 11 Oct 2011 21:21:07 -0400 Received: from mail48-tx2-R.bigfish.com (10.9.14.244) by TX2EHSOBE009.bigfish.com (10.9.40.29) with Microsoft SMTP Server id 14.1.225.22; Wed, 12 Oct 2011 01:21:06 +0000 Received: from mail48-tx2 (localhost.localdomain [127.0.0.1]) by mail48-tx2-R.bigfish.com (Postfix) with ESMTP id F236DA9836C; Wed, 12 Oct 2011 01:21:05 +0000 (UTC) X-SpamScore: 3 X-BigFish: VS3(zzc8kzz1202hzz8275bhz2dh2a8h668h839h63h) X-Spam-TCS-SCL: 2:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-SS: 0, Received: from mail48-tx2 (localhost.localdomain [127.0.0.1]) by mail48-tx2 (MessageSwitch) id 1318382453505347_18864; Wed, 12 Oct 2011 01:20:53 +0000 (UTC) Received: from TX2EHSMHS021.bigfish.com (unknown [10.9.14.250]) by mail48-tx2.bigfish.com (Postfix) with ESMTP id 7460B40055; Wed, 12 Oct 2011 01:20:53 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS021.bigfish.com (10.9.99.121) with Microsoft SMTP Server (TLS) id 14.1.225.22; Wed, 12 Oct 2011 01:20:53 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.339.2; Tue, 11 Oct 2011 20:20:52 -0500 Received: from localhost (right.am.freescale.net [10.82.193.13]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p9C1Kpk4011876; Tue, 11 Oct 2011 20:20:52 -0500 (CDT) From: Andy Fleming To: CC: Subject: [PATCH] phylib: Modify Vitesse RGMII skew settings Date: Tue, 11 Oct 2011 20:20:51 -0500 Message-ID: <1318382451-2194-1-git-send-email-afleming@freescale.com> X-Mailer: git-send-email 1.7.3.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Vitesse driver was using the RGMII_ID interface type to determine if skew was necessary. However, we want to move away from using that interface type, as it's really a property of the board's PHY connection. However, some boards depend on it, so we want to support it, while allowing new boards to use the more flexible "fixups" approach. To do this, we extract the code which adds skew into its own function, and call that function when RGMII_ID has been selected. Another side-effect of this change is that if your PHY has skew set already, it doesn't clear it. This way, the fixup code can modify the register without config_init then clearing it. Signed-off-by: Andy Fleming --- drivers/net/phy/vitesse.c | 34 ++++++++++++++++++++++------------ 1 files changed, 22 insertions(+), 12 deletions(-) diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c index 5d8f6e1..0ec8e09 100644 --- a/drivers/net/phy/vitesse.c +++ b/drivers/net/phy/vitesse.c @@ -3,7 +3,7 @@ * * Author: Kriston Carson * - * Copyright (c) 2005 Freescale Semiconductor, Inc. + * Copyright (c) 2005, 2009 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -61,32 +61,42 @@ MODULE_DESCRIPTION("Vitesse PHY driver"); MODULE_AUTHOR("Kriston Carson"); MODULE_LICENSE("GPL"); -static int vsc824x_config_init(struct phy_device *phydev) +int vsc824x_add_skew(struct phy_device *phydev) { - int extcon; int err; - - err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT, - MII_VSC8244_AUXCONSTAT_INIT); - if (err < 0) - return err; + int extcon; extcon = phy_read(phydev, MII_VSC8244_EXT_CON1); if (extcon < 0) - return err; + return extcon; extcon &= ~(MII_VSC8244_EXTCON1_TX_SKEW_MASK | MII_VSC8244_EXTCON1_RX_SKEW_MASK); - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) - extcon |= (MII_VSC8244_EXTCON1_TX_SKEW | - MII_VSC8244_EXTCON1_RX_SKEW); + extcon |= (MII_VSC8244_EXTCON1_TX_SKEW | + MII_VSC8244_EXTCON1_RX_SKEW); err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon); return err; } +EXPORT_SYMBOL(vsc824x_add_skew); + +static int vsc824x_config_init(struct phy_device *phydev) +{ + int err; + + err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT, + MII_VSC8244_AUXCONSTAT_INIT); + if (err < 0) + return err; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + err = vsc824x_add_skew(phydev); + + return err; +} static int vsc824x_ack_interrupt(struct phy_device *phydev) {