@@ -843,6 +843,21 @@ static u32 macb_dbw(struct macb *bp)
}
}
+/*
+ * Configure the receive DMA engine to use the correct receive buffer size.
+ * This is a configurable parameter for GEM.
+ */
+static void macb_configure_dma(struct macb *bp)
+{
+ u32 dmacfg;
+
+ if (bp->is_gem) {
+ dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
+ dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64);
+ gem_writel(bp, DMACFG, dmacfg);
+ }
+}
+
static void macb_init_hw(struct macb *bp)
{
u32 config;
@@ -861,6 +876,8 @@ static void macb_init_hw(struct macb *bp)
config |= macb_dbw(bp);
macb_writel(bp, NCFGR, config);
+ macb_configure_dma(bp);
+
/* Initialize TX and RX buffers */
macb_writel(bp, RBQP, bp->rx_ring_dma);
macb_writel(bp, TBQP, bp->tx_ring_dma);
@@ -64,6 +64,7 @@
/* GEM register offsets. */
#define GEM_NCFGR 0x0004
#define GEM_USRIO 0x000c
+#define GEM_DMACFG 0x0010
#define GEM_HRB 0x0080
#define GEM_HRT 0x0084
#define GEM_SA1B 0x0088
@@ -154,6 +155,10 @@
#define GEM_DBW64 1
#define GEM_DBW128 2
+/* Bitfields in DMACFG. */
+#define GEM_RXBS_OFFSET 16
+#define GEM_RXBS_SIZE 8
+
/* Bitfields in NSR */
#define MACB_NSR_LINK_OFFSET 0
#define MACB_NSR_LINK_SIZE 1
GEM has configurable receive buffer sizes so requires this to be programmed up. Any size < 2048 and a multiple of 64 bytes is permitted. Signed-off-by: Jamie Iles <jamie@jamieiles.com> --- drivers/net/macb.c | 17 +++++++++++++++++ drivers/net/macb.h | 5 +++++ 2 files changed, 22 insertions(+), 0 deletions(-)