From patchwork Tue Jan 5 19:20:41 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Grandegger X-Patchwork-Id: 42163 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 5795EB7DDC for ; Wed, 6 Jan 2010 06:20:57 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755354Ab0AETUp (ORCPT ); Tue, 5 Jan 2010 14:20:45 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755218Ab0AETUo (ORCPT ); Tue, 5 Jan 2010 14:20:44 -0500 Received: from mail-out.m-online.net ([212.18.0.10]:45890 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755307Ab0AETUm (ORCPT ); Tue, 5 Jan 2010 14:20:42 -0500 Received: from mail01.m-online.net (mail.m-online.net [192.168.3.149]) by mail-out.m-online.net (Postfix) with ESMTP id CEE9D1C0015E; Tue, 5 Jan 2010 20:20:41 +0100 (CET) X-Auth-Info: xZyI6cYTBY82DKQaSpKIah5o75f8WUQVRMFynRVvPkM= Received: from mail.denx.de (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTP id C328A9018F; Tue, 5 Jan 2010 20:20:41 +0100 (CET) Received: from pollux.denx.de (pollux [192.168.1.1]) by mail.denx.de (Postfix) with ESMTP id 941914234F9B; Tue, 5 Jan 2010 20:20:41 +0100 (CET) Received: by pollux.denx.de (Postfix, from userid 504) id 82B491012361C; Tue, 5 Jan 2010 20:20:41 +0100 (CET) From: Wolfgang Grandegger To: Netdev@vger.kernel.org Cc: Socketcan-core@lists.berlios.de, Linuxppc-dev@lists.ozlabs.org, Devicetree-discuss@lists.ozlabs.org, Wolfram Sang , Wolfgang Grandegger Subject: [PATCH net-next v2 3/3] powerpc/mpc5xxx: add OF platform binding doc for FSL MSCAN devices Date: Tue, 5 Jan 2010 20:20:41 +0100 Message-Id: <1262719241-2422-4-git-send-email-wg@grandegger.com> X-Mailer: git-send-email 1.6.2.5 In-Reply-To: <1262719241-2422-3-git-send-email-wg@grandegger.com> References: <1262719241-2422-1-git-send-email-wg@grandegger.com> <1262719241-2422-2-git-send-email-wg@grandegger.com> <1262719241-2422-3-git-send-email-wg@grandegger.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Wolfgang Grandegger This patch adds documentation for the MSCAN OF device bindings for the MPC512x and moves the one for the MPC5200 to the new common file "Documentation/powerpc/dts-bindings/fsl/can.txt". Signed-off-by: Wolfgang Grandegger Acked-by: Wolfram Sang --- Documentation/powerpc/dts-bindings/fsl/can.txt | 53 ++++++++++++++++++++ Documentation/powerpc/dts-bindings/fsl/mpc5200.txt | 9 +--- 2 files changed, 54 insertions(+), 8 deletions(-) create mode 100644 Documentation/powerpc/dts-bindings/fsl/can.txt diff --git a/Documentation/powerpc/dts-bindings/fsl/can.txt b/Documentation/powerpc/dts-bindings/fsl/can.txt new file mode 100644 index 0000000..2fa4fcd --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/can.txt @@ -0,0 +1,53 @@ +CAN Device Tree Bindings +------------------------ + +(c) 2006-2009 Secret Lab Technologies Ltd +Grant Likely + +fsl,mpc5200-mscan nodes +----------------------- +In addition to the required compatible-, reg- and interrupt-properties, you can +also specify which clock source shall be used for the controller: + +- fsl,mscan-clock-source : a string describing the clock source. Valid values + are: "ip" for ip bus clock + "ref" for reference clock (XTAL) + "ref" is default in case this property is not + present. + +fsl,mpc5121-mscan nodes +----------------------- +In addition to the required compatible-, reg- and interrupt-properties, you can +also specify which clock source and divider shall be used for the controller: + +- fsl,mscan-clock-source : a string describing the clock source. Valid values + are: "ip" for ip bus clock + "ref" for reference clock + "sys" for system clock + If this property is not present, an optimal CAN + clock source and frequency based on the system + clock will be selected. If this is not possible, + the reference clock will be used. + +- fsl,mscan-clock-divider: for the reference and system clock, an additional + clock divider can be specified. By default, a + value of 1 is used. + +Note that the MPC5121 Rev. 1 processor is not supported. + +Examples: + can@1300 { + compatible = "fsl,mpc5121-mscan"; + interrupts = <12 0x8>; + interrupt-parent = <&ipic>; + reg = <0x1300 0x80>; + }; + + can@1380 { + compatible = "fsl,mpc5121-mscan"; + interrupts = <13 0x8>; + interrupt-parent = <&ipic>; + reg = <0x1380 0x80>; + fsl,mscan-clock-source = "ref"; + fsl,mscan-clock-divider = <3>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt index cabc780..95accfa 100644 --- a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt +++ b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt @@ -180,11 +180,4 @@ External interrupts: fsl,mpc5200-mscan nodes ----------------------- -In addition to the required compatible-, reg- and interrupt-properites, you can -also specify which clock source shall be used for the controller: - -- fsl,mscan-clock-source- a string describing the clock source. Valid values - are: "ip" for ip bus clock - "ref" for reference clock (XTAL) - "ref" is default in case this property is not - present. +See file can.txt in this directory.