From patchwork Wed Apr 17 21:59:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Bauer X-Patchwork-Id: 1087258 Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=david-bauer.net Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44kx3k3Yrxz9s47 for ; Thu, 18 Apr 2019 07:59:46 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387449AbfDQV7f (ORCPT ); Wed, 17 Apr 2019 17:59:35 -0400 Received: from mars.blocktrron.ovh ([51.254.112.43]:50064 "EHLO mail.blocktrron.ovh" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725848AbfDQV7f (ORCPT ); Wed, 17 Apr 2019 17:59:35 -0400 Received: from dbauer-t470.ffda.io (unknown [IPv6:2001:67c:2ed8:100e:1d5b:d9ea:42ea:f977]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.blocktrron.ovh (Postfix) with ESMTPSA id 770D11E3EE; Wed, 17 Apr 2019 23:59:32 +0200 (CEST) From: David Bauer To: devicetree@vger.kernel.org, netdev@vger.kernel.org Subject: [PATCH v3 0/3] net: add reset-controller driven PHY reset Date: Wed, 17 Apr 2019 23:59:19 +0200 Message-Id: <20190417215922.30472-1-mail@david-bauer.net> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patchset adds support for a PHY reset driven by a reset-controller. Currently, only GPIO driven resets are supported by the PHY subsystem. It also renames the reset-gpio from 'reset' to 'reset_gpio' to better differentiate between resets wired to a GPIO and resets wired to a reset-controller driven pin. Some systems have the PHY reset-line wired to a pin controlled by a reset-controller (eg. some Atheros AR9132 based boards). In case the bootloader asserts reset before loading the kernel, we currently do not have a clean way of deasserting reset to probe the PHY. v3: - add missing newline in mdio_bus.c v2: - fixed missed rename of "reset" in at803x.c - move initial reset to mdio_device_reset David Bauer (3): dt-bindings: net: add PHY reset controller binding net: phy: add support for reset-controller net: mdio: rename mdio_device reset to reset_gpio Documentation/devicetree/bindings/net/phy.txt | 6 ++++ drivers/net/phy/at803x.c | 2 +- drivers/net/phy/mdio_bus.c | 33 ++++++++++++++++--- drivers/net/phy/mdio_device.c | 13 ++++++-- include/linux/mdio.h | 3 +- 5 files changed, 48 insertions(+), 9 deletions(-)