From patchwork Thu May 10 23:16:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Burton X-Patchwork-Id: 911608 Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mips.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40hq0d3PkMz9s1p for ; Fri, 11 May 2018 09:18:41 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751099AbeEJXSi (ORCPT ); Thu, 10 May 2018 19:18:38 -0400 Received: from 9pmail.ess.barracuda.com ([64.235.154.210]:42278 "EHLO 9pmail.ess.barracuda.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751478AbeEJXSh (ORCPT ); Thu, 10 May 2018 19:18:37 -0400 Received: from mipsdag02.mipstec.com (mail2.mips.com [12.201.5.32]) by mx1414.ess.rzc.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=NO); Thu, 10 May 2018 23:16:59 +0000 Received: from mipsdag02.mipstec.com (10.20.40.47) by mipsdag02.mipstec.com (10.20.40.47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1415.2; Thu, 10 May 2018 16:17:26 -0700 Received: from pburton-laptop.mipstec.com (10.20.1.18) by mipsdag02.mipstec.com (10.20.40.47) with Microsoft SMTP Server id 15.1.1415.2 via Frontend Transport; Thu, 10 May 2018 16:17:26 -0700 From: Paul Burton To: CC: , "David S . Miller" , Andrew Lunn , Paul Burton Subject: [PATCH v6 0/6] net: pch_gbe: MIPS support Date: Thu, 10 May 2018 16:16:51 -0700 Message-ID: <20180510231657.28503-1-paul.burton@mips.com> X-Mailer: git-send-email 2.17.0 MIME-Version: 1.0 X-BESS-ID: 1525994219-531716-19409-25997-1 X-BESS-VER: 2018.6-r1805011734 X-BESS-Apparent-Source-IP: 12.201.5.32 X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.192889 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS59374 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Intel EG20T Platform Controller Hub is used on the MIPS Boston development board to provide various peripherals including ethernet. This series migrates the pch_gbe driver's PHY support to use phylib, implements support for device tree which we use to provide the PHY reset GPIO, and allows the driver to be built for MIPS. Applies atop v4.17-rc4. Please note that I don't have access to the Intel systems (eg. MinnowBoard v1) that make use of this driver, so am unable to test on those. If anyone with such a system could test the series that would be much appreciated. v6 of the series is later than I'd hoped, but we had a product release[1] that kept me busy. My apologies! The series is significantly different to earlier versions - Andrew did the legwork of converting to phylib and that simplified things significantly. v5 contained further fixes to the driver which I've removed from v6 such that this series is just enough to get the driver running on the MIPS Boston platform, despite a few bugs in the interest of a simpler & more focused patch series. I'll submit those fixes separately. Thanks, Paul [1] https://www.mips.com/press/new-mips-i7200-processor-core-delivers-unmatched-performance-and-efficiency-for-advanced-lte5g-communications-and-networking-ic-designs/ Andrew Lunn (2): net: phy: at803x: Export at803x_debug_reg_mask() net: ethernet: pch_gbe: Convert to mdiobus and phylib Paul Burton (4): net: pch_gbe: Support DeviceTree for MDIO/PHY description ptp: pch: Allow build on MIPS platforms net: pch_gbe: Allow build on MIPS platforms MIPS: Boston: Adjust DT for pch_gbe PHY support arch/mips/boot/dts/img/boston.dts | 13 +- drivers/net/ethernet/oki-semi/pch_gbe/Kconfig | 5 +- .../net/ethernet/oki-semi/pch_gbe/Makefile | 2 +- .../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 35 +- .../ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 118 ------ .../ethernet/oki-semi/pch_gbe/pch_gbe_api.h | 8 +- .../oki-semi/pch_gbe/pch_gbe_ethtool.c | 89 +--- .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 382 +++++++++--------- .../ethernet/oki-semi/pch_gbe/pch_gbe_param.c | 265 ------------ .../ethernet/oki-semi/pch_gbe/pch_gbe_phy.c | 377 ----------------- .../ethernet/oki-semi/pch_gbe/pch_gbe_phy.h | 37 -- drivers/net/phy/at803x.c | 5 +- drivers/ptp/Kconfig | 2 +- include/linux/at803x_phy.h | 16 + 14 files changed, 249 insertions(+), 1105 deletions(-) delete mode 100644 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c delete mode 100644 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h create mode 100644 include/linux/at803x_phy.h